Index: trunk/src/os2ahci/os2ahci.c
===================================================================
--- trunk/src/os2ahci/os2ahci.c	(revision 32)
+++ trunk/src/os2ahci/os2ahci.c	(revision 33)
@@ -85,4 +85,7 @@
 static char     init_msg[] = "OS2AHCI driver version %d.%02d\n";
 static char     exit_msg[] = "OS2AHCI driver *not* installed\n";
+static char     eval_msg[] = ANSI_CLR_RED ANSI_CLR_BRIGHT "Evaluation version "
+                             "- not licensed for production use.\n" ANSI_RESET;
+
 
 /* ----------------------------- start of code ----------------------------- */
@@ -140,4 +143,5 @@
   /* print initialization message */
   cprintf(init_msg, VERSION / 100, VERSION % 100);
+  cprintf(eval_msg);
 
   /* register driver with resource manager */
Index: trunk/src/os2ahci/os2ahci.def
===================================================================
--- trunk/src/os2ahci/os2ahci.def	(revision 32)
+++ trunk/src/os2ahci/os2ahci.def	(revision 33)
@@ -1,4 +1,4 @@
 library os2ahci
-Description '$@#thi.guten (www.thiguten.de):1.00.20100930#@OS/2 AHCI Adapter Device Driver'
+Description '$@#thi.guten (www.thiguten.de):1.00.20101001#@OS/2 AHCI Adapter Device Driver'
 protmode
 
Index: trunk/src/os2ahci/os2ahci.h
===================================================================
--- trunk/src/os2ahci/os2ahci.h	(revision 32)
+++ trunk/src/os2ahci/os2ahci.h	(revision 33)
@@ -239,4 +239,16 @@
 #define PCI_CLASS_STORAGE_OTHER         0x0180
 
+/******************************************************************************
+ * ANSI color code constants
+ */
+#define ANSI_CLR_BRIGHT "\x1b[1m"
+#define ANSI_CLR_RED    "\x1b[31m"
+#define ANSI_CLR_GREEN  "\x1b[32m"
+#define ANSI_CLR_BLUE   "\x1b[34m"
+#define ANSI_CLR_CYAN   "\x1b[36m"
+#define ANSI_CLR_WHITE  "\x1b[37m"
+#define ANSI_RESET      "\x1b[0m"
+
+
 /* ------------------------ typedefs and structures ------------------------ */
 
@@ -255,4 +267,5 @@
   u32   class_mask;      /* bits to match when scanning for 'class' */
   u32   board;           /* AHCI controller board type (board_* constants) */
+  char  *chipname;       /* human readable chip ID string */
 } PCI_ID;
 
@@ -434,4 +447,6 @@
 extern int       pci_enable_int (UCHAR bus, UCHAR dev_func);
 extern void      pci_hack_virtualbox(void);
+extern char     *vendor_from_id (u16 vendor);
+extern char     *device_from_id (u16 device);
 
 /* ctxhook.c */
Index: trunk/src/os2ahci/pci.c
===================================================================
--- trunk/src/os2ahci/pci.c	(revision 32)
+++ trunk/src/os2ahci/pci.c	(revision 33)
@@ -1,7 +1,7 @@
 /******************************************************************************
- * pci.c - PCI constants and detection code for os2ahci driver
+ * PCI.c - PCI constants and detection code for os2ahci driver
  *
  * Copyright (c) 2010 Christian Mueller. Parts copied from/inspired by the
- * Linux AHCI driver; those parts are (c) Linux AHCI/ATA maintainers
+ * LINUX ahci driver; those parts are (c) Linux AHCI/ATA maintainers
  *
  *  This program is free software; you can redistribute it and/or modify
@@ -155,4 +155,31 @@
 
 /******************************************************************************
+ * chipset/controller name strings
+ */
+static char chip_esb2[]       = "ESB2";
+static char chip_ich8[]       = "ICH8";
+static char chip_ich8m[]      = "ICH8M";
+static char chip_ich9[]       = "ICH9";
+static char chip_ich9m[]      = "ICH9M";
+static char chip_ich10[]      = "ICH10";
+static char chip_pchahci[]    = "PCH AHCI";
+static char chip_pchraid[]    = "PCH RAID";
+static char chip_tolapai[]    = "Tolapai";
+static char chip_sb600[]      = "SB600";
+static char chip_sb700[]      = "SB700/800";
+static char chip_vt8251[]     = "VT8251";
+static char chip_mcp65[]      = "MCP65";
+static char chip_mcp67[]      = "MCP67";
+static char chip_mcp73[]      = "MCP73";
+static char chip_mcp77[]      = "MCP77";
+static char chip_mcp79[]      = "MCP79";
+static char chip_mcp89[]      = "MCP689";
+static char chip_sis968[]     = "968";
+
+static char s_generic[]       = "Generic";
+
+
+
+/******************************************************************************
  * PCI vendor and device IDs for known AHCI adapters. Copied from the Linux
  * AHCI driver.
@@ -164,57 +191,57 @@
    * NOTE: ICH5 controller does NOT support AHCI, so we do
    *       not add it here! */
-  { PCI_VDEVICE(INTEL, 0x2652), board_ahci }, /* ICH6 */
-  { PCI_VDEVICE(INTEL, 0x2653), board_ahci }, /* ICH6M */
-  { PCI_VDEVICE(INTEL, 0x27c1), board_ahci }, /* ICH7 */
-  { PCI_VDEVICE(INTEL, 0x27c5), board_ahci }, /* ICH7M */
-  { PCI_VDEVICE(INTEL, 0x27c3), board_ahci }, /* ICH7R */
-  { PCI_VDEVICE(AL,    0x5288), board_ahci_ign_iferr }, /* ULi M5288 */
-  { PCI_VDEVICE(INTEL, 0x2681), board_ahci }, /* ESB2 */
-  { PCI_VDEVICE(INTEL, 0x2682), board_ahci }, /* ESB2 */
-  { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */
-  { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
-  { PCI_VDEVICE(INTEL, 0x2821), board_ahci }, /* ICH8 */
-  { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf }, /* ICH8 */
-  { PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */
-  { PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */
-  { PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */
-  { PCI_VDEVICE(INTEL, 0x2922), board_ahci }, /* ICH9 */
-  { PCI_VDEVICE(INTEL, 0x2923), board_ahci }, /* ICH9 */
-  { PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */
-  { PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */
-  { PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */
-  { PCI_VDEVICE(INTEL, 0x2929), board_ahci }, /* ICH9M */
-  { PCI_VDEVICE(INTEL, 0x292a), board_ahci }, /* ICH9M */
-  { PCI_VDEVICE(INTEL, 0x292b), board_ahci }, /* ICH9M */
-  { PCI_VDEVICE(INTEL, 0x292c), board_ahci }, /* ICH9M */
-  { PCI_VDEVICE(INTEL, 0x292f), board_ahci }, /* ICH9M */
-  { PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */
-  { PCI_VDEVICE(INTEL, 0x294e), board_ahci }, /* ICH9M */
-  { PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */
-  { PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */
-  { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
-  { PCI_VDEVICE(INTEL, 0x3a22), board_ahci }, /* ICH10 */
-  { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */
-  { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */
-  { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
-  { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
-  { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
-  { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH AHCI */
-  { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
-  { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
-  { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
+  { PCI_VDEVICE(INTEL, 0x2652), board_ahci,            "ICH6"       }, /* ICH6 */
+  { PCI_VDEVICE(INTEL, 0x2653), board_ahci,            "ICH6M"      }, /* ICH6M */
+  { PCI_VDEVICE(INTEL, 0x27c1), board_ahci,            "ICH7"       }, /* ICH7 */
+  { PCI_VDEVICE(INTEL, 0x27c5), board_ahci,            "ICH7M"      }, /* ICH7M */
+  { PCI_VDEVICE(INTEL, 0x27c3), board_ahci,            "ICH7R"      }, /* ICH7R */
+  { PCI_VDEVICE(AL,    0x5288), board_ahci_ign_iferr,  "ULiM5288"   }, /* ULi M5288 */
+  { PCI_VDEVICE(INTEL, 0x2681), board_ahci,            chip_esb2    }, /* ESB2 */
+  { PCI_VDEVICE(INTEL, 0x2682), board_ahci,            chip_esb2    }, /* ESB2 */
+  { PCI_VDEVICE(INTEL, 0x2683), board_ahci,            chip_esb2    }, /* ESB2 */
+  { PCI_VDEVICE(INTEL, 0x27c6), board_ahci,            "ICH7MDH"    }, /* ICH7-M DH */
+  { PCI_VDEVICE(INTEL, 0x2821), board_ahci,            chip_ich8    }, /* ICH8 */
+  { PCI_VDEVICE(INTEL, 0x2822), board_ahci_nosntf,     chip_ich8    }, /* ICH8 */
+  { PCI_VDEVICE(INTEL, 0x2824), board_ahci,            chip_ich8    }, /* ICH8 */
+  { PCI_VDEVICE(INTEL, 0x2829), board_ahci,            chip_ich8m   }, /* ICH8M */
+  { PCI_VDEVICE(INTEL, 0x282a), board_ahci,            chip_ich8m   }, /* ICH8M */
+  { PCI_VDEVICE(INTEL, 0x2922), board_ahci,            chip_ich9    }, /* ICH9 */
+  { PCI_VDEVICE(INTEL, 0x2923), board_ahci,            chip_ich9    }, /* ICH9 */
+  { PCI_VDEVICE(INTEL, 0x2924), board_ahci,            chip_ich9    }, /* ICH9 */
+  { PCI_VDEVICE(INTEL, 0x2925), board_ahci,            chip_ich9    }, /* ICH9 */
+  { PCI_VDEVICE(INTEL, 0x2927), board_ahci,            chip_ich9    }, /* ICH9 */
+  { PCI_VDEVICE(INTEL, 0x2929), board_ahci,            chip_ich9m   }, /* ICH9M */
+  { PCI_VDEVICE(INTEL, 0x292a), board_ahci,            chip_ich9m   }, /* ICH9M */
+  { PCI_VDEVICE(INTEL, 0x292b), board_ahci,            chip_ich9m   }, /* ICH9M */
+  { PCI_VDEVICE(INTEL, 0x292c), board_ahci,            chip_ich9m   }, /* ICH9M */
+  { PCI_VDEVICE(INTEL, 0x292f), board_ahci,            chip_ich9m   }, /* ICH9M */
+  { PCI_VDEVICE(INTEL, 0x294d), board_ahci,            chip_ich9    }, /* ICH9 */
+  { PCI_VDEVICE(INTEL, 0x294e), board_ahci,            chip_ich9m   }, /* ICH9M */
+  { PCI_VDEVICE(INTEL, 0x502a), board_ahci,            chip_tolapai }, /* Tolapai */
+  { PCI_VDEVICE(INTEL, 0x502b), board_ahci,            chip_tolapai }, /* Tolapai */
+  { PCI_VDEVICE(INTEL, 0x3a05), board_ahci,            chip_ich10   }, /* ICH10 */
+  { PCI_VDEVICE(INTEL, 0x3a22), board_ahci,            chip_ich10   }, /* ICH10 */
+  { PCI_VDEVICE(INTEL, 0x3a25), board_ahci,            chip_ich10   }, /* ICH10 */
+  { PCI_VDEVICE(INTEL, 0x3b22), board_ahci,            chip_pchahci }, /* PCH AHCI */
+  { PCI_VDEVICE(INTEL, 0x3b23), board_ahci,            chip_pchahci }, /* PCH AHCI */
+  { PCI_VDEVICE(INTEL, 0x3b24), board_ahci,            chip_pchraid }, /* PCH RAID */
+  { PCI_VDEVICE(INTEL, 0x3b25), board_ahci,            chip_pchraid }, /* PCH RAID */
+  { PCI_VDEVICE(INTEL, 0x3b29), board_ahci,            chip_pchahci }, /* PCH AHCI */
+  { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci,            chip_pchraid }, /* PCH RAID */
+  { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci,            chip_pchraid }, /* PCH RAID */
+  { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci,            chip_pchahci }, /* PCH AHCI */
 
   /* JMicron 360/1/3/5/6, match class to avoid IDE function */
   { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-    PCI_CLASS_STORAGE_SATA_AHCI, 0xffffffL, board_ahci_ign_iferr },
+    PCI_CLASS_STORAGE_SATA_AHCI, 0xffffffL, board_ahci_ign_iferr, "360" },
 
   /* ATI */
-  { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */
-  { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb700 }, /* ATI SB700/800 */
-  { PCI_VDEVICE(ATI, 0x4391), board_ahci_sb700 }, /* ATI SB700/800 */
-  { PCI_VDEVICE(ATI, 0x4392), board_ahci_sb700 }, /* ATI SB700/800 */
-  { PCI_VDEVICE(ATI, 0x4393), board_ahci_sb700 }, /* ATI SB700/800 */
-  { PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700 }, /* ATI SB700/800 */
-  { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */
+  { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600,        "SB600"      }, /* ATI SB600 */
+  { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb700,        chip_sb700   }, /* ATI SB700/800 */
+  { PCI_VDEVICE(ATI, 0x4391), board_ahci_sb700,        chip_sb700   }, /* ATI SB700/800 */
+  { PCI_VDEVICE(ATI, 0x4392), board_ahci_sb700,        chip_sb700   }, /* ATI SB700/800 */
+  { PCI_VDEVICE(ATI, 0x4393), board_ahci_sb700,        chip_sb700   }, /* ATI SB700/800 */
+  { PCI_VDEVICE(ATI, 0x4394), board_ahci_sb700,        chip_sb700   }, /* ATI SB700/800 */
+  { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700,        chip_sb700   }, /* ATI SB700/800 */
 
   /* AMD */
@@ -222,110 +249,110 @@
   /* AMD is using RAID class only for ahci controllers */
   { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-    PCI_CLASS_STORAGE_RAID << 8, 0xffffffL, board_ahci },
+    PCI_CLASS_STORAGE_RAID << 8, 0xffffffL, board_ahci, "Hudson2" },
 
   /* VIA */
-  { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */
-  { PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251 }, /* VIA VT8251 */
+  { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251,       chip_vt8251  }, /* VIA VT8251 */
+  { PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251,       chip_vt8251  }, /* VIA VT8251 */
 
   /* NVIDIA */
-  { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 },      /* MCP65 */
-  { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq },     /* MCP67 */
-  { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq },     /* Linux ID */
-  { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_yesncq },     /* MCP73 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci },            /* MCP77 */
-  { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci },            /* MCP79 */
-  { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci },            /* MCP89 */
-  { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci },            /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x044c), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x044d), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x044e), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x044f), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x045c), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65,     chip_mcp65   }, /* MCP65 */
+  { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq,    chip_mcp67   }, /* MCP67 */
+  { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq,    chip_mcp67   }, /* Linux ID */
+  { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_yesncq,    chip_mcp73   }, /* MCP73 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci,           chip_mcp77   }, /* MCP77 */
+  { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci,           chip_mcp79   }, /* MCP79 */
+  { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci,           chip_mcp89   }, /* MCP89 */
+  { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci,           chip_mcp89   }, /* MCP89 */
 
   /* SiS */
-  { PCI_VDEVICE(SI, 0x1184), board_ahci },                /* SiS 966 */
-  { PCI_VDEVICE(SI, 0x1185), board_ahci },                /* SiS 968 */
-  { PCI_VDEVICE(SI, 0x0186), board_ahci },                /* SiS 968 */
+  { PCI_VDEVICE(SI, 0x1184), board_ahci,               "966"        }, /* SiS 966 */
+  { PCI_VDEVICE(SI, 0x1185), board_ahci,               chip_sis968  }, /* SiS 968 */
+  { PCI_VDEVICE(SI, 0x0186), board_ahci,               chip_sis968  }, /* SiS 968 */
 
   /* Marvell */
-  { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv },        /* 6145 */
-  { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv },        /* 6121 */
+  { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv,       "6145"       }, /* 6145 */
+  { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv,       "6121"       }, /* 6121 */
 
   /* Promise */
-  { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci },   /* PDC42819 */
+  { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci,          "PDC42819"   }, /* PDC42819 */
 
   /* Generic, PCI class code for AHCI */
   { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
-    PCI_CLASS_STORAGE_SATA_AHCI, 0xffffffL, board_ahci },
+    PCI_CLASS_STORAGE_SATA_AHCI, 0xffffffL, board_ahci, s_generic   },
 
   /* end of list, including a few slots to define custom adapters (10) */
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-  { 0, 0, 0, 0, 0, 0, 0 },
-
-  { 0, 0, 0, 0, 0, 0, 0 }
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+  { 0, 0, 0, 0, 0, 0, 0, NULL },
+
+  { 0, 0, 0, 0, 0, 0, 0, NULL }
 };
 
@@ -363,4 +390,5 @@
   pci_ids[i].device = device;
   pci_ids[i].board = board_ahci;
+  pci_ids[i].chipname = s_generic;
   return(0);
 }
@@ -560,6 +588,9 @@
 
   /* found a supported AHCI device */
-  cprintf("found AHCI device: %04x:%04x (class = 0x%06lx, bus = %d, dev_func = 0x%02x)\n",
-          vendor, device, class, bus, dev_func);
+  cprintf("found AHCI device: %s %s (%04x:%04x)\n"
+          " class:0x%06lx bus:%d devfunc:0x%02x\n",
+          vendor_from_id(vendor), device_from_id(device),
+          vendor, device,
+          class, bus, dev_func);
 
   /* make sure we got room in the adapter information array */
@@ -930,2 +961,66 @@
   return(data->bios_info.rc);
 }
+
+/******************************************************************************
+ * return vendor name for PCI vendor ID
+ */
+char *vendor_from_id(u16 id)
+{
+
+  switch(id) {
+    
+    case PCI_VENDOR_ID_AL:
+      return "Ali";
+    case PCI_VENDOR_ID_AMD:
+    case PCI_VENDOR_ID_ATI:
+      return "AMD";
+    case PCI_VENDOR_ID_AT:
+      return "Allied Telesyn";
+    case PCI_VENDOR_ID_ATT:
+      return "ATT";
+    case PCI_VENDOR_ID_CMD:
+      return "CMD";
+    case PCI_VENDOR_ID_CT:
+      return "CT";
+    case PCI_VENDOR_ID_INTEL:
+      return "Intel";
+    case PCI_VENDOR_ID_INITIO:
+      return "Initio";
+    case PCI_VENDOR_ID_JMICRON:
+      return "JMicron";
+    case PCI_VENDOR_ID_MARVELL:
+      return "Marvell";
+    case PCI_VENDOR_ID_NVIDIA:
+      return "NVIDIA";
+    case PCI_VENDOR_ID_PROMISE:
+      return "PROMISE";
+    case PCI_VENDOR_ID_SI:
+      return "SiS";
+    case PCI_VENDOR_ID_VIA:
+      return "VIA";
+    default:
+      break;
+    }
+    
+  return "Generic";
+
+}
+
+/******************************************************************************
+ * return a device name for a PCI device id
+ * NOTE: this is as simple as can be, so don't call it twice in one statement.
+ */
+char *device_from_id(u16 device)
+{
+  int i;
+
+  for (i = 0; pci_ids[i].vendor != 0; i++) {
+    
+    if (pci_ids[i].device == device) {
+      return pci_ids[i].chipname;
+    }
+  
+  }
+
+  return s_generic;
+}
