source: trunk/src/os2ahci/os2ahci.h@ 205

Last change on this file since 205 was 205, checked in by David Azarewicz, 5 years ago

Fixed ADD RM id.
File size: 23.4 KB
Line 
1/**
2 * os2ahci.h - main header file for os2ahci driver
3 *
4 * Copyright (c) 2011 thi.guten Software Development
5 * Copyright (c) 2011 Mensys B.V.
6 * Copyright (c) 2013-2021 David Azarewicz <david@88watts.net>
7 *
8 * Authors: Christian Mueller, Markus Thielen
9 *
10 * Parts copied from/inspired by the Linux AHCI driver;
11 * those parts are (c) Linux AHCI/ATA maintainers
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 */
27
28/* IMPORTANT NOTE: The DDK headers require tight structure packing and this
29 * is controlled via compiler parameters. Thus, all stuctures in os2ahci.add
30 * are expected to be byte-aligned without the need of explicit pragma pack()
31 * directives. Where possible, the structures are laid out such that words
32 * and dwords are aligned at least on 2-byte boundaries.
33 */
34
35/* Global feature defines
36 * DEBUG = enable debug logging routines to be compled in.
37 * LEGACY_APM = enable the legacy APM interface to be compiled in.
38 * Legacy APM support is not needed on eCS systems with ACPI and is more reliable without it enabled.
39 */
40//#define LEGACY_APM
41//#define DAZ_NEW_CODE
42
43#include "Dev32lib.h"
44#include "Dev32rmcalls.h"
45#include <Dev32iorb.h>
46#include "ahci.h"
47#include "ahci-idc.h"
48
49#define MAX_AD 8 /* maximum number of adapters */
50
51#define TIMER_COUNT 128
52
53/* default command timeout (can be overwritten in the IORB) */
54#define DEFAULT_TIMEOUT 30000
55
56/* Maximum number of retries for commands in the restart/reset context hooks.
57 *
58 * Please note that the corresponding variable in the ADD workspace is a bit
59 * field, thus increasing this value means increasing the size of the bit
60 * field. At the time of writing this comment the 'retries' variable was 2
61 * bits wide (i.e. a maximum number of 3 retries) and there was exactly one
62 * bit left before the ADD workspace structure would become too large...
63 */
64#define MAX_RETRIES 3
65
66/* debug output macros */
67#ifdef DEBUG
68#define DPRINTF(a,b,...) dprintf(a, b, ##__VA_ARGS__)
69#define DHEXDUMP(a,b,c,d,...) dHexDump(a, b, c, d, ##__VA_ARGS__)
70#define DUMP_HOST_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_host_regs(a,b);}
71#define DUMP_PORT_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_port_regs(a,b);}
72#else
73#define DPRINTF(a,b,...)
74#define DHEXDUMP(a,b,c,d,...)
75#define DUMP_HOST_REGS(l,a,b)
76#define DUMP_PORT_REGS(l,a,b)
77#endif
78
79/* verbosity console print macros
80 * (we use 'i' in ciprintf here to avoid name clash
81 * with vprintf-like funcs)
82 */
83#define ciprintf(a,...) {if (verbosity > 0) iprintf(a, ##__VA_ARGS__);}
84#define ciiprintf(a,...) {if (verbosity > 1) iprintf(a, ##__VA_ARGS__);}
85
86/* adapter number from AD_INFO pointer; mainly for dprintf() purposes */
87#define ad_no(ai) ( ( (u32)ai - (u32)ad_infos ) / sizeof(*ai))
88
89#define MakeNear16PtrFromDiff(Base16, Base32, New32) \
90 ( ( CastFar16ToULONG(Base16) + ( (ULONG)(New32) - (ULONG)(Base32) ) ) & 0xffff)
91
92#define MakeFar16PtrFromDiff(Base16, Base32, New32) \
93 CastULONGToFar16(CastFar16ToULONG(Base16) + ((ULONG)(New32) - (ULONG)(Base32))))
94
95/* Takes the selector from the first parameter, and the offset specified
96 * in the second parameter, and returns a flat pointer
97 */
98extern void *MakeFlatFromNear16(void __far16 *, USHORT);
99#pragma aux MakeFlatFromNear16 = \
100 "mov ax, bx" \
101 "call Far16ToFlat" \
102 parm nomemory [eax] [bx] value [eax] modify nomemory exact [eax];
103
104/* stdarg.h macros with explicit far pointers */
105typedef char *va_list;
106#define va_start(va, last) va = (va_list) (&last + 1)
107#define va_arg(va, type) ((type *) (va += sizeof(type)))[-1]
108#define va_end(va) va = 0
109
110/* stddef macros */
111#define offsetof(s, e) ((u32)&((s *)0)->e)
112
113/* shortcut macros */
114#define spin_lock(sl) KernAcquireSpinLock(&sl)
115#define spin_unlock(sl) KernReleaseSpinLock(&sl)
116
117/* Get AHCI port MMIO base from AD_INFO and port number. */
118#define port_base(ai, p) ((u8 *) (ai)->mmio + 0x100 + (p) * 0x80)
119#define port_dma_base(ai, p) ((AHCI_PORT_DMA *) ((ai)->ports[(p)].dma_buf))
120#define port_dma_base_phys(ai, p) ((ai)->ports[p].dma_buf_phys)
121
122/* Convert an SATA adapter/port/device address into a 16-bit IORB unit handle
123 * (and the other way round). The mapping looks like this:
124 *
125 * mapping comment
126 * -----------------------------------------------------------------------
127 * 4 bits for the adapter current max is 8 adapters
128 * 4 bits for the port AHCI spec defines up to 32 ports
129 * 4 bits for the device SATA spec defines up to 15 devices behind PMP
130 */
131#define iorb_unit(a, p, d) ((((u16) (a) & 0x0fU) << 8) | \
132 (((u16) (p) & 0x0fU) << 4) | \
133 (((u16) (d) & 0x0fU)))
134#define iorb_unit_adapter(iorb) (((iorb)->UnitHandle >> 8) & 0x07)
135#define iorb_unit_port(iorb) (((iorb)->UnitHandle >> 4) & 0x0f)
136#define iorb_unit_device(iorb) ((iorb)->UnitHandle & 0x0f)
137
138/*******************************************************************************
139 * Convenience macros for IORB processing functions
140 */
141/* is this IORB on driver or port level? */
142#define iorb_driver_level(iorb) ((iorb)->CommandCode == IOCC_CONFIGURATION)
143
144/* is this IORB to be inserted at the beginnig of the IORB queue? */
145#define iorb_priority(iorb) ((iorb)->CommandCode == IOCC_DEVICE_CONTROL && \
146 (iorb)->CommandModifier == IOCM_ABORT))
147
148/* access IORB ADD workspace */
149#define add_workspace(iorb) ((ADD_WORKSPACE *) &(iorb)->ADDWorkSpace)
150
151
152
153/******************************************************************************
154 * PCI generic IDs and macros
155 */
156#define PCI_ANY_ID 0xffffU
157#define PCI_VDEVICE(vendor, device) PCI_VENDOR_ID_##vendor, (device), \
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0
159
160/******************************************************************************
161 * PCI vendor IDs for AHCI adapters known to this driver (copied from Linux
162 * pci_ids.h)
163 */
164#define PCI_VENDOR_ID_AL 0x10b9
165#define PCI_VENDOR_ID_AMD 0x1022
166#define PCI_VENDOR_ID_AT 0x1259
167#define PCI_VENDOR_ID_ATI 0x1002
168#define PCI_VENDOR_ID_ATT 0x11c1
169#define PCI_VENDOR_ID_CMD 0x1095
170#define PCI_VENDOR_ID_CT 0x102c
171#define PCI_VENDOR_ID_INTEL 0x8086
172#define PCI_VENDOR_ID_INITIO 0x1101
173#define PCI_VENDOR_ID_JMICRON 0x197B
174#define PCI_VENDOR_ID_MARVELL 0x11ab
175#define PCI_VENDOR_ID_NVIDIA 0x10de
176#define PCI_VENDOR_ID_PROMISE 0x105a
177#define PCI_VENDOR_ID_SI 0x1039
178#define PCI_VENDOR_ID_VIA 0x1106
179
180/******************************************************************************
181 * PCI class IDs we're interested in (copied from Linux pci_ids.h)
182 */
183#define PCI_BASE_CLASS_STORAGE 0x01
184#define PCI_CLASS_STORAGE_SCSI 0x0100
185#define PCI_CLASS_STORAGE_IDE 0x0101
186#define PCI_CLASS_STORAGE_FLOPPY 0x0102
187#define PCI_CLASS_STORAGE_IPI 0x0103
188#define PCI_CLASS_STORAGE_RAID 0x0104
189#define PCI_CLASS_STORAGE_SATA 0x0106
190#define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
191#define PCI_CLASS_STORAGE_SAS 0x0107
192#define PCI_CLASS_STORAGE_OTHER 0x0180
193
194/******************************************************************************
195 * ANSI color code constants
196 */
197#define ANSI_CLR_BRIGHT "\x1b[1m"
198#define ANSI_CLR_RED "\x1b[31m"
199#define ANSI_CLR_GREEN "\x1b[32m"
200#define ANSI_CLR_BLUE "\x1b[34m"
201#define ANSI_CLR_CYAN "\x1b[36m"
202#define ANSI_CLR_WHITE "\x1b[37m"
203#define ANSI_RESET "\x1b[0m"
204
205
206/* ------------------------ typedefs and structures ------------------------ */
207
208/* PCI device information structure; this is used both for scanning and for
209 * identification purposes in 'AD_INFO'; based on the Linux pci_device_id
210 * structure but hard-wired to use board_* constants for 'driver_data'
211 */
212typedef struct {
213 u16 vendor; /* PCI device vendor/manufacturer */
214 u16 device; /* PCI device ID inside vendor scope */
215 u16 subvendor; /* subsystem vendor (unused so far) */
216 u16 subdevice; /* subsystem device (unused so far) */
217 u32 class; /* PCI device class */
218 u32 class_mask; /* bits to match when scanning for 'class' */
219 u32 board; /* AHCI controller board type (board_* constants) */
220 char *chipname; /* human readable chip ID string */
221} PCI_ID;
222
223/* IORB queue; since IORB queues are updated at interrupt time, the
224 * corresponding pointers (not the data they point to) need to be volatile.
225 */
226typedef struct {
227 IORBH FAR16DATA *volatile vRoot; /* root of request list */
228 IORBH FAR16DATA *volatile vTail; /* tail of request list */
229} IORB_QUEUE;
230
231typedef struct {
232 USHORT Cylinders;
233 USHORT HeadsPerCylinder;
234 USHORT SectorsPerTrack;
235 ULONG TotalSectors;
236 char *Method;
237} DEV_INFO;
238
239/* port information structure */
240typedef struct {
241 IORB_QUEUE iorb_queue; /* 00 IORB queue for this port */
242 unsigned dev_max : 4; /* 08 maximum device number on this port (0..AHCI_MAX_DEVS-1) */
243 unsigned cmd_slot : 5; /* current command slot index (using round-
244 * robin indexes to prevent starvation) */
245
246 volatile u32 ncq_cmds; /* 0c bitmap for NCQ commands issued */
247 volatile u32 reg_cmds; /* 10 bitmap for regular commands issued */
248 u32 dma_buf_phys; /* 14 physical address of DMA scratch buffer */
249 u8 *dma_buf; /* 18 DMA scatch buffers */
250
251 struct { /* 1c */
252 unsigned allocated :1; /* if != 0, device is allocated */
253 unsigned present :1; /* if != 0, device is present */
254 unsigned lba48 :1; /* if != 0, device supports 48-bit LBA */
255 unsigned atapi :1; /* if != 0, this is an ATAPI device */
256 unsigned atapi_16 :1; /* if != 0, device suports 16-byte cmds */
257 unsigned removable :1; /* if != 0, device has removable media */
258 unsigned dev_type :5; /* device type (UIB_TYPE_* in iorb.h) */
259 unsigned ncq_max :5; /* maximum tag number for queued commands */
260 unsigned ignored :1; /* if != 0, device is not MBR added in 2.06 */
261 UNITINFO *unit_info; /* pointer to modified unit info */
262 DEV_INFO dev_info;
263 char dev_name[AHCI_DEV_NAME_LEN];
264 } devs[AHCI_MAX_DEVS];
265
266 u32 unaligned_read_count;
267 u32 error_count;
268 u32 ulResetCount; /* added in 2.07 */
269} P_INFO;
270
271/* adapter information structure */
272typedef struct {
273 PCI_ID *pci; /* 00 pointer to corresponding PCI ID */
274
275 unsigned port_max : 5; /* 04 maximum port number (0..AHCI_MAX_PORTS-1) */
276 unsigned cmd_max : 5; /* maximum cmd slot number (0-31) */
277 unsigned port_scan_done : 1; /* if != 0, port scan already done */
278 unsigned busy : 1; /* if != 0, adapter is busy */
279 unsigned hw_ports : 6; /* number of ports as reported by the hardware */
280 unsigned int_set:1; /* interrupt has been set */
281
282 u32 port_map; /* 08 bitmap of active ports */
283 u16 pci_vendor; /* 0c */
284 u16 pci_device; /* 0e */
285
286 /* initial adapter configuration from BIOS */
287 u32 bios_config[HOST_CAP2 / sizeof(u32) + 1]; /* 10 0x24 / 4 + 1 = 0x0a dwords = 0x28 bytes*/
288
289 u32 cap; /* 38 working copy of CAP register */
290 u32 cap2; /* 3c working copy of CAP2 register */
291 u32 flags; /* 40 adapter flags */
292
293 HRESOURCE rm_adh; /* 44 resource handle for adapter */
294 HRESOURCE rm_bars[6]; /* 48 resource handle for MMIO and I/O BARs */
295
296 u16 bus_dev_func; /* 64 PCI bus number PCI device and function number */
297 u8 irq; /* 66 interrupt number */
298 u8 irq_pin; /* 67 irq pin */
299
300 u32 mmio_phys; /* 68 physical address of MMIO region */
301 u32 mmio_size; /* 6c size of MMIO region */
302 u8 *mmio; /* 70 pointer to this adapter's MMIO region */
303
304 P_INFO ports[AHCI_MAX_PORTS]; /* 74 SATA ports on this adapter */
305} AD_INFO;
306
307/* ADD workspace in IORB (must not exceed 16 bytes) */
308typedef struct {
309 void (*ppfunc)(IORBH FAR16DATA *vIorb, IORBH *pIorb); /* 00 post-processing function */
310 void *buf; /* 04 response buffer (e.g. for identify cmds) */
311 ULONG timer; /* 08 timer for timeout procesing */
312 USHORT blocks; /* 0c number of blocks to be transferred */
313 unsigned short processing :1; /* 0e IORB is being processd */
314 unsigned short idempotent :1; /* IORB is idempotent (can be retried) */
315 unsigned short queued_hw :1; /* IORB has been queued to hardware */
316 unsigned short no_ncq :1; /* must not use native command queuing */
317 unsigned short is_ncq :1; /* should use native command queueing */
318 unsigned short complete :1; /* IORB has completed processing */
319 unsigned short unaligned :1; /* unaligned S/G; need to use transfer buffer */
320 unsigned short retries :2; /* number of retries for this command */
321 unsigned short cmd_slot :5; /* AHCI command slot for this IORB */
322} ADD_WORKSPACE; /* 10 */
323
324/* sg_memcpy() direction */
325typedef enum {
326 SG_TO_BUF, /* copy from S/G list to buffer */
327 BUF_TO_SG /* copy from buffer to S/G list */
328} SG_MEMCPY_DIRECTION;
329
330/* Define the size of a disk name. Disk Names are user defined names given to physical disk drives in the system. */
331#define DLA_TABLE_SIGNATURE1 0x424D5202L
332#define DLA_TABLE_SIGNATURE2 0x44464D50L
333#define DISK_NAME_SIZE 20
334
335typedef struct _DLA_Table_Sector { /* DTS */
336 ULONG DLA_Signature1; /* The magic signature (part 1) of a Drive Letter Assignment Table. */
337 ULONG DLA_Signature2; /* The magic signature (part 2) of a Drive Letter Assignment Table. */
338 ULONG DLA_CRC; /* The 32 bit CRC for this sector. Calculated assuming that this field and all unused space in the sector is 0. */
339 ULONG Disk_Serial_Number; /* The serial number assigned to this disk. */
340 ULONG Boot_Disk_Serial_Number;/* The serial number of the disk used to boot the system. This is for conflict resolution when multiple volumes
341 want the same drive letter. Since LVM.EXE will not let this situation happen, the only way to get this situation
342 is for the disk to have been altered by something other than LVM.EXE, or if a disk drive has been moved from one
343 machine to another. If the drive has been moved, then it should have a different Boot_Disk_Serial_Number. Thus,
344 we can tell which disk drive is the "foreign" drive and therefore reject its claim for the drive letter in question.
345 If we find that all of the claimaints have the same Boot_Disk_Serial_Number, then we must assign drive letters on
346 a first come, first serve basis. */
347 ULONG Install_Flags; /* Used by the Install program. */
348 ULONG Cylinders;
349 ULONG Heads_Per_Cylinder;
350 ULONG Sectors_Per_Track;
351 char Disk_Name[DISK_NAME_SIZE]; /* The name assigned to the disk containing this sector. */
352 UCHAR Reboot; /* For use by Install. Used to keep track of reboots initiated by install. */
353 BYTE Reserved[3]; /* Alignment. */
354 /* These are the four entries which correspond to the entries in the partition table. */
355} DLA_Table_Sector, *PDLA_Table_Sector;
356
357static inline unsigned long readl(void *a)
358{
359 return *(volatile unsigned long*)a;
360}
361
362static inline void writel(void *a, unsigned long v)
363{
364 *(volatile unsigned long*)a = v;
365}
366
367extern void shutdown_driver(void);
368
369/* os2ahci.c */
370extern USHORT init_drv(REQPACKET *req);
371extern USHORT gen_ioctl(REQPACKET *ioctl);
372extern USHORT char_dev_input(REQPACKET *rwrb);
373extern USHORT exit_drv(int func);
374extern USHORT sr_drv(int func);
375extern void add_entry(IORBH FAR16DATA *vIorb);
376extern void trigger_engine(void);
377extern int trigger_engine_1(void);
378extern void send_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb);
379extern void iocc_configuration (IORBH FAR16DATA *vIorb, IORBH *pIorb);
380extern void iocc_device_control(IORBH FAR16DATA *vIorb, IORBH *pIorb);
381extern void iocc_unit_control(IORBH FAR16DATA *vIorb, IORBH *pIorb);
382extern void iocm_device_table(IORBH FAR16DATA *vIorb, IORBH *pIorb);
383extern void iocc_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb);
384extern void iocc_execute_io(IORBH FAR16DATA *vIorb, IORBH *pIorb);
385extern void iocc_unit_status(IORBH FAR16DATA *vIorb, IORBH *pIorb);
386extern void iocc_adapter_passthru(IORBH FAR16DATA *vIorb, IORBH *pIorb);
387extern void iorb_queue_add(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb, IORBH *pIorb);
388extern int iorb_queue_del(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb);
389extern void iorb_seterr(IORBH *pIorb, USHORT error_code);
390extern void iorb_done(IORBH FAR16DATA *vIorb, IORBH *pIorb);
391extern void iorb_complete(IORBH FAR16DATA *vIorb, IORBH *pIorb);
392extern void iorb_requeue(IORBH *pIorb);
393extern void aws_free(ADD_WORKSPACE *aws);
394extern void lock_adapter(AD_INFO *ai);
395extern void unlock_adapter(AD_INFO *ai);
396extern void __syscall timeout_callback(ULONG timer_handle, ULONG p1);
397extern void __syscall reset_watchdog(ULONG timer_handle, ULONG p1);
398
399/* ahci.c */
400extern int ahci_config_caps(AD_INFO *ai);
401extern int ahci_save_bios_config(AD_INFO *ai);
402extern int ahci_restore_bios_config(AD_INFO *ai);
403extern int ahci_restore_initial_config(AD_INFO *ai);
404extern AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p);
405extern void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc);
406extern int ahci_enable_ahci(AD_INFO *ai);
407extern int ahci_scan_ports(AD_INFO *ai);
408extern int ahci_complete_init(AD_INFO *ai);
409extern int ahci_reset_port(AD_INFO *ai, int p, int ei);
410extern int ahci_start_port(AD_INFO *ai, int p, int ei);
411extern void ahci_start_fis_rx(AD_INFO *ai, int p);
412extern void ahci_start_engine(AD_INFO *ai, int p);
413extern int ahci_stop_port(AD_INFO *ai, int p);
414extern int ahci_stop_fis_rx(AD_INFO *ai, int p);
415extern int ahci_stop_engine(AD_INFO *ai, int p);
416extern int ahci_port_busy(AD_INFO *ai, int p);
417extern void ahci_exec_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int ncq_capable, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int));
418extern void ahci_exec_polled_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int), ULONG timeout);
419extern int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...);
420extern int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle);
421extern int ahci_flush_cache(AD_INFO *ai, int p, int d);
422
423extern int ahci_intr(u32 irq);
424extern void ahci_port_intr(AD_INFO *ai, int p);
425extern void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat);
426
427extern void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb);
428extern void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb);
429extern void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb);
430extern void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb);
431extern void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb);
432extern void ahci_execute_cdb(IORBH FAR16DATA *vIorb, IORBH *pIorb);
433extern void ahci_execute_ata(IORBH FAR16DATA *vIorb, IORBH *pIorb);
434extern void ahci_dump_host_regs(AD_INFO *ai, int bios_regs);
435extern void ahci_dump_port_regs(AD_INFO *ai, int p);
436extern int ahci_reset_controller(AD_INFO *ai);
437
438extern void sg_memcpy(SCATGATENTRY *sg_list, USHORT sg_cnt, ULONG sg_off, void *buf, USHORT len, SG_MEMCPY_DIRECTION dir);
439extern void panic(char *msg);
440
441/* trace.c */
442extern void build_user_info(void);
443
444/* pci.c */
445extern int add_pci_id(u16 vendor, u16 device);
446extern void scan_pci_bus(void);
447extern int pci_enable_int(USHORT BusDevFunc);
448extern void pci_hack_virtualbox(void);
449extern char *vendor_from_id(u16 vendor);
450extern char *device_from_id(u16 device);
451
452/* ctxhook.c */
453extern void _Syscall restart_ctxhook(ULONG parm);
454extern void _Syscall reset_ctxhook(ULONG parm);
455extern void _Syscall engine_ctxhook(ULONG parm);
456
457/* apm.c */
458extern void apm_init(void);
459extern void suspend(void);
460extern void resume(void);
461
462/* ioctl.c */
463extern USHORT ioctl_get_devlist(REQPACKET *ioctl);
464extern USHORT ioctl_passthrough(REQPACKET *ioctl);
465extern USHORT ioctl_gen_dsk(REQPACKET *ioctl);
466extern USHORT ioctl_smart(REQPACKET *ioctl);
467
468
469extern int thorough_scan; /* if != 0, perform thorough PCI scan */
470extern int init_reset; /* if != 0, reset ports during init */
471extern int force_write_cache; /* if != 0, force write cache */
472extern int verbosity; /* if != 0, show some info during boot */
473extern int use_mbr_test;
474
475extern HDRIVER rm_drvh; /* resource manager driver handle */
476extern USHORT add_handle; /* adapter device driver handle */
477extern char drv_name[]; /* driver name as string ("OS2AHCI") */
478
479extern PCI_ID pci_ids[]; /* SATA adapter PCI IDs */
480extern SpinLock_t drv_lock; /* driver-level spinlock */
481extern ULONG com_lock; /* debug log spinlock */
482extern IORB_QUEUE driver_queue; /* driver-level IORB queue */
483extern AD_INFO ad_infos[]; /* adapter information list */
484extern int ad_info_cnt; /* number of entries in ad_infos[] */
485extern u16 ad_ignore; /* bitmap with adapters to be ignored */
486extern int init_complete; /* if != 0, initialization has completed */
487extern int suspended; /* indicates if the driver is suspended */
488extern int resume_sleep_flag;
489
490/* port restart context hook and input data */
491extern ULONG restart_ctxhook_h;
492extern volatile u32 ports_to_restart[MAX_AD];
493
494/* port reset context hook and input data */
495extern ULONG reset_ctxhook_h;
496extern ULONG th_reset_watchdog;
497extern volatile u32 ports_to_reset[MAX_AD];
498extern IORB_QUEUE abort_queue;
499
500/* trigger engine context hook and input data */
501extern ULONG engine_ctxhook_h;
502
503/* apapter/port-specific options saved when parsing the command line */
504extern u8 emulate_scsi[MAX_AD][AHCI_MAX_PORTS];
505extern u8 enable_ncq[MAX_AD][AHCI_MAX_PORTS];
506extern u8 link_speed[MAX_AD][AHCI_MAX_PORTS];
507extern u8 link_power[MAX_AD][AHCI_MAX_PORTS];
508extern u8 track_size[MAX_AD][AHCI_MAX_PORTS];
509extern u8 port_ignore[MAX_AD][AHCI_MAX_PORTS];
510
511#ifdef DEBUG
512extern void DumpIorb(IORBH *pIorb);
513#endif
514
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