source: trunk/src/os2ahci/os2ahci.h@ 194

Last change on this file since 194 was 190, checked in by David Azarewicz, 8 years ago

Added MSI support.
File size: 23.7 KB
Line 
1/******************************************************************************
2 * os2ahci.h - main header file for os2ahci driver
3 *
4 * Copyright (c) 2011 thi.guten Software Development
5 * Copyright (c) 2011 Mensys B.V.
6 * Copyright (c) 2013-2016 David Azarewicz
7 *
8 * Authors: Christian Mueller, Markus Thielen
9 *
10 * Parts copied from/inspired by the Linux AHCI driver;
11 * those parts are (c) Linux AHCI/ATA maintainers
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 */
27
28/* ----------------------------- include files ----------------------------- */
29
30/* IMPORTANT NOTE: The DDK headers require tight structure packing and this
31 * is controlled via compiler parameters. Thus, all stuctures in os2ahci.add
32 * are expected to be byte-aligned without the need of explicit pragma pack()
33 * directives. Where possible, the structures are laid out such that words
34 * and dwords are aligned at least on 2-byte boundaries.
35 */
36
37/* Global feature defines
38 * DEBUG = enable debug logging routines to be compled in.
39 * LEGACY_APM = enable the legacy APM interface to be compiled in.
40 * Legacy APM support is not needed on eCS systems with ACPI and is more reliable without it enabled.
41 */
42//#define LEGACY_APM
43//#define DAZ_NEW_CODE
44
45#include "Dev32lib.h"
46#include "Dev32rmcalls.h"
47#include <Dev32iorb.h>
48#include "ahci.h"
49#include "ahci-idc.h"
50
51/* -------------------------- macros and constants ------------------------- */
52
53#define MAX_AD 8 /* maximum number of adapters */
54
55#define TIMER_COUNT 128
56
57/* default command timeout (can be overwritten in the IORB) */
58#define DEFAULT_TIMEOUT 30000
59
60/* Maximum number of retries for commands in the restart/reset context hooks.
61 *
62 * Please note that the corresponding variable in the ADD workspace is a bit
63 * field, thus increasing this value means increasing the size of the bit
64 * field. At the time of writing this comment the 'retries' variable was 2
65 * bits wide (i.e. a maximum number of 3 retries) and there was exactly one
66 * bit left before the ADD workspace structure would become too large...
67 */
68#define MAX_RETRIES 3
69
70/* debug output macros */
71#ifdef DEBUG
72#define DPRINTF(a,b,...) dprintf(a, b, ##__VA_ARGS__)
73#define DHEXDUMP(a,b,c,d,...) dHexDump(a, b, c, d, ##__VA_ARGS__)
74#define DUMP_HOST_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_host_regs(a,b);}
75#define DUMP_PORT_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_port_regs(a,b);}
76#else
77#define DPRINTF(a,b,...)
78#define DHEXDUMP(a,b,c,d,...)
79#define DUMP_HOST_REGS(l,a,b)
80#define DUMP_PORT_REGS(l,a,b)
81#endif
82
83/* verbosity console print macros
84 * (we use 'i' in ciprintf here to avoid name clash
85 * with vprintf-like funcs)
86 */
87#define ciprintf(a,...) {if (verbosity > 0) iprintf(a, ##__VA_ARGS__);}
88#define ciiprintf(a,...) {if (verbosity > 1) iprintf(a, ##__VA_ARGS__);}
89
90/* adapter number from AD_INFO pointer; mainly for dprintf() purposes */
91#define ad_no(ai) ( ( (u32)ai - (u32)ad_infos ) / sizeof(*ai))
92
93#define MakeNear16PtrFromDiff(Base16, Base32, New32) \
94 ( ( CastFar16ToULONG(Base16) + ( (ULONG)(New32) - (ULONG)(Base32) ) ) & 0xffff)
95
96#define MakeFar16PtrFromDiff(Base16, Base32, New32) \
97 CastULONGToFar16(CastFar16ToULONG(Base16) + ((ULONG)(New32) - (ULONG)(Base32))))
98
99/* Takes the selector from the first parameter, and the offset specified
100 * in the second parameter, and returns a flat pointer
101 */
102extern void *MakeFlatFromNear16(void __far16 *, USHORT);
103#pragma aux MakeFlatFromNear16 = \
104 "mov ax, bx" \
105 "call Far16ToFlat" \
106 parm nomemory [eax] [bx] value [eax] modify nomemory exact [eax];
107
108/* stdarg.h macros with explicit far pointers */
109typedef char *va_list;
110#define va_start(va, last) va = (va_list) (&last + 1)
111#define va_arg(va, type) ((type *) (va += sizeof(type)))[-1]
112#define va_end(va) va = 0
113
114/* stddef macros */
115#define offsetof(s, e) ((u32)&((s *)0)->e)
116
117/* shortcut macros */
118#define spin_lock(sl) KernAcquireSpinLock(&sl)
119#define spin_unlock(sl) KernReleaseSpinLock(&sl)
120
121/* Get AHCI port MMIO base from AD_INFO and port number. */
122#define port_base(ai, p) ((u8 *) (ai)->mmio + 0x100 + (p) * 0x80)
123#define port_dma_base(ai, p) ((AHCI_PORT_DMA *) ((ai)->ports[(p)].dma_buf))
124#define port_dma_base_phys(ai, p) ((ai)->ports[p].dma_buf_phys)
125
126/* Convert an SATA adapter/port/device address into a 16-bit IORB unit handle
127 * (and the other way round). The mapping looks like this:
128 *
129 * mapping comment
130 * -----------------------------------------------------------------------
131 * 4 bits for the adapter current max is 8 adapters
132 * 4 bits for the port AHCI spec defines up to 32 ports
133 * 4 bits for the device SATA spec defines up to 15 devices behind PMP
134 */
135#define iorb_unit(a, p, d) ((((u16) (a) & 0x0fU) << 8) | \
136 (((u16) (p) & 0x0fU) << 4) | \
137 (((u16) (d) & 0x0fU)))
138#define iorb_unit_adapter(iorb) (((iorb)->UnitHandle >> 8) & 0x07)
139#define iorb_unit_port(iorb) (((iorb)->UnitHandle >> 4) & 0x0f)
140#define iorb_unit_device(iorb) ((iorb)->UnitHandle & 0x0f)
141
142/*******************************************************************************
143 * Convenience macros for IORB processing functions
144 */
145/* is this IORB on driver or port level? */
146#define iorb_driver_level(iorb) ((iorb)->CommandCode == IOCC_CONFIGURATION)
147
148/* is this IORB to be inserted at the beginnig of the IORB queue? */
149#define iorb_priority(iorb) ((iorb)->CommandCode == IOCC_DEVICE_CONTROL && \
150 (iorb)->CommandModifier == IOCM_ABORT))
151
152/* access IORB ADD workspace */
153#define add_workspace(iorb) ((ADD_WORKSPACE *) &(iorb)->ADDWorkSpace)
154
155
156
157/******************************************************************************
158 * PCI generic IDs and macros
159 */
160#define PCI_ANY_ID 0xffffU
161#define PCI_VDEVICE(vendor, device) PCI_VENDOR_ID_##vendor, (device), \
162 PCI_ANY_ID, PCI_ANY_ID, 0, 0
163
164/******************************************************************************
165 * PCI vendor IDs for AHCI adapters known to this driver (copied from Linux
166 * pci_ids.h)
167 */
168#define PCI_VENDOR_ID_AL 0x10b9
169#define PCI_VENDOR_ID_AMD 0x1022
170#define PCI_VENDOR_ID_AT 0x1259
171#define PCI_VENDOR_ID_ATI 0x1002
172#define PCI_VENDOR_ID_ATT 0x11c1
173#define PCI_VENDOR_ID_CMD 0x1095
174#define PCI_VENDOR_ID_CT 0x102c
175#define PCI_VENDOR_ID_INTEL 0x8086
176#define PCI_VENDOR_ID_INITIO 0x1101
177#define PCI_VENDOR_ID_JMICRON 0x197B
178#define PCI_VENDOR_ID_MARVELL 0x11ab
179#define PCI_VENDOR_ID_NVIDIA 0x10de
180#define PCI_VENDOR_ID_PROMISE 0x105a
181#define PCI_VENDOR_ID_SI 0x1039
182#define PCI_VENDOR_ID_VIA 0x1106
183
184/******************************************************************************
185 * PCI class IDs we're interested in (copied from Linux pci_ids.h)
186 */
187#define PCI_BASE_CLASS_STORAGE 0x01
188#define PCI_CLASS_STORAGE_SCSI 0x0100
189#define PCI_CLASS_STORAGE_IDE 0x0101
190#define PCI_CLASS_STORAGE_FLOPPY 0x0102
191#define PCI_CLASS_STORAGE_IPI 0x0103
192#define PCI_CLASS_STORAGE_RAID 0x0104
193#define PCI_CLASS_STORAGE_SATA 0x0106
194#define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
195#define PCI_CLASS_STORAGE_SAS 0x0107
196#define PCI_CLASS_STORAGE_OTHER 0x0180
197
198/******************************************************************************
199 * ANSI color code constants
200 */
201#define ANSI_CLR_BRIGHT "\x1b[1m"
202#define ANSI_CLR_RED "\x1b[31m"
203#define ANSI_CLR_GREEN "\x1b[32m"
204#define ANSI_CLR_BLUE "\x1b[34m"
205#define ANSI_CLR_CYAN "\x1b[36m"
206#define ANSI_CLR_WHITE "\x1b[37m"
207#define ANSI_RESET "\x1b[0m"
208
209
210/* ------------------------ typedefs and structures ------------------------ */
211
212/* PCI device information structure; this is used both for scanning and for
213 * identification purposes in 'AD_INFO'; based on the Linux pci_device_id
214 * structure but hard-wired to use board_* constants for 'driver_data'
215 */
216typedef struct {
217 u16 vendor; /* PCI device vendor/manufacturer */
218 u16 device; /* PCI device ID inside vendor scope */
219 u16 subvendor; /* subsystem vendor (unused so far) */
220 u16 subdevice; /* subsystem device (unused so far) */
221 u32 class; /* PCI device class */
222 u32 class_mask; /* bits to match when scanning for 'class' */
223 u32 board; /* AHCI controller board type (board_* constants) */
224 char *chipname; /* human readable chip ID string */
225} PCI_ID;
226
227/* IORB queue; since IORB queues are updated at interrupt time, the
228 * corresponding pointers (not the data they point to) need to be volatile.
229 */
230typedef struct {
231 IORBH FAR16DATA *volatile vRoot; /* root of request list */
232 IORBH FAR16DATA *volatile vTail; /* tail of request list */
233} IORB_QUEUE;
234
235typedef struct {
236 USHORT Cylinders;
237 USHORT HeadsPerCylinder;
238 USHORT SectorsPerTrack;
239 ULONG TotalSectors;
240 char *Method;
241} DEV_INFO;
242
243/* port information structure */
244typedef struct {
245 IORB_QUEUE iorb_queue; /* 00 IORB queue for this port */
246 unsigned dev_max : 4; /* 08 maximum device number on this port (0..AHCI_MAX_DEVS-1) */
247 unsigned cmd_slot : 5; /* current command slot index (using round-
248 * robin indexes to prevent starvation) */
249
250 volatile u32 ncq_cmds; /* 0c bitmap for NCQ commands issued */
251 volatile u32 reg_cmds; /* 10 bitmap for regular commands issued */
252 u32 dma_buf_phys; /* 14 physical address of DMA scratch buffer */
253 u8 *dma_buf; /* 18 DMA scatch buffers */
254
255 struct { /* 1c */
256 unsigned allocated :1; /* if != 0, device is allocated */
257 unsigned present :1; /* if != 0, device is present */
258 unsigned lba48 :1; /* if != 0, device supports 48-bit LBA */
259 unsigned atapi :1; /* if != 0, this is an ATAPI device */
260 unsigned atapi_16 :1; /* if != 0, device suports 16-byte cmds */
261 unsigned removable :1; /* if != 0, device has removable media */
262 unsigned dev_type :5; /* device type (UIB_TYPE_* in iorb.h) */
263 unsigned ncq_max :5; /* maximum tag number for queued commands */
264 UNITINFO *unit_info; /* pointer to modified unit info */
265 DEV_INFO dev_info;
266 char dev_name[AHCI_DEV_NAME_LEN];
267 } devs[AHCI_MAX_DEVS];
268
269 u32 unaligned_read_count;
270 u32 error_count;
271} P_INFO;
272
273/* adapter information structure */
274typedef struct {
275 PCI_ID *pci; /* 00 pointer to corresponding PCI ID */
276
277 unsigned port_max : 5; /* 04 maximum port number (0..AHCI_MAX_PORTS-1) */
278 unsigned cmd_max : 5; /* maximum cmd slot number (0-31) */
279 unsigned port_scan_done : 1; /* if != 0, port scan already done */
280 unsigned busy : 1; /* if != 0, adapter is busy */
281 unsigned hw_ports : 6; /* number of ports as reported by the hardware */
282 unsigned int_set:1; /* interrupt has been set */
283
284 u32 port_map; /* 08 bitmap of active ports */
285 u16 pci_vendor; /* 0c */
286 u16 pci_device; /* 0e */
287
288 /* initial adapter configuration from BIOS */
289 u32 bios_config[HOST_CAP2 / sizeof(u32) + 1]; /* 10 0x24 / 4 + 1 = 0x0a dwords = 0x28 bytes*/
290
291 u32 cap; /* 38 working copy of CAP register */
292 u32 cap2; /* 3c working copy of CAP2 register */
293 u32 flags; /* 40 adapter flags */
294
295 HRESOURCE rm_adh; /* 44 resource handle for adapter */
296 HRESOURCE rm_bars[6]; /* 48 resource handle for MMIO and I/O BARs */
297
298 u16 bus_dev_func; /* 64 PCI bus number PCI device and function number */
299 u8 irq; /* 66 interrupt number */
300 u8 irq_pin; /* 67 irq pin */
301
302 u32 mmio_phys; /* 68 physical address of MMIO region */
303 u32 mmio_size; /* 6c size of MMIO region */
304 u8 *mmio; /* 70 pointer to this adapter's MMIO region */
305
306 P_INFO ports[AHCI_MAX_PORTS]; /* 74 SATA ports on this adapter */
307} AD_INFO;
308
309/* ADD workspace in IORB (must not exceed 16 bytes) */
310typedef struct {
311 void (*ppfunc)(IORBH FAR16DATA *vIorb, IORBH *pIorb); /* 00 post-processing function */
312 void *buf; /* 04 response buffer (e.g. for identify cmds) */
313 ULONG timer; /* 08 timer for timeout procesing */
314 USHORT blocks; /* 0c number of blocks to be transferred */
315 unsigned short processing :1; /* 0e IORB is being processd */
316 unsigned short idempotent :1; /* IORB is idempotent (can be retried) */
317 unsigned short queued_hw :1; /* IORB has been queued to hardware */
318 unsigned short no_ncq :1; /* must not use native command queuing */
319 unsigned short is_ncq :1; /* should use native command queueing */
320 unsigned short complete :1; /* IORB has completed processing */
321 unsigned short unaligned :1; /* unaligned S/G; need to use transfer buffer */
322 unsigned short retries :2; /* number of retries for this command */
323 unsigned short cmd_slot :5; /* AHCI command slot for this IORB */
324} ADD_WORKSPACE; /* 10 */
325
326/* sg_memcpy() direction */
327typedef enum {
328 SG_TO_BUF, /* copy from S/G list to buffer */
329 BUF_TO_SG /* copy from buffer to S/G list */
330} SG_MEMCPY_DIRECTION;
331
332/* Define the size of a disk name. Disk Names are user defined names given to physical disk drives in the system. */
333#define DLA_TABLE_SIGNATURE1 0x424D5202L
334#define DLA_TABLE_SIGNATURE2 0x44464D50L
335#define DISK_NAME_SIZE 20
336
337typedef struct _DLA_Table_Sector { /* DTS */
338 ULONG DLA_Signature1; /* The magic signature (part 1) of a Drive Letter Assignment Table. */
339 ULONG DLA_Signature2; /* The magic signature (part 2) of a Drive Letter Assignment Table. */
340 ULONG DLA_CRC; /* The 32 bit CRC for this sector. Calculated assuming that this field and all unused space in the sector is 0. */
341 ULONG Disk_Serial_Number; /* The serial number assigned to this disk. */
342 ULONG Boot_Disk_Serial_Number;/* The serial number of the disk used to boot the system. This is for conflict resolution when multiple volumes
343 want the same drive letter. Since LVM.EXE will not let this situation happen, the only way to get this situation
344 is for the disk to have been altered by something other than LVM.EXE, or if a disk drive has been moved from one
345 machine to another. If the drive has been moved, then it should have a different Boot_Disk_Serial_Number. Thus,
346 we can tell which disk drive is the "foreign" drive and therefore reject its claim for the drive letter in question.
347 If we find that all of the claimaints have the same Boot_Disk_Serial_Number, then we must assign drive letters on
348 a first come, first serve basis. */
349 ULONG Install_Flags; /* Used by the Install program. */
350 ULONG Cylinders;
351 ULONG Heads_Per_Cylinder;
352 ULONG Sectors_Per_Track;
353 char Disk_Name[DISK_NAME_SIZE]; /* The name assigned to the disk containing this sector. */
354 UCHAR Reboot; /* For use by Install. Used to keep track of reboots initiated by install. */
355 BYTE Reserved[3]; /* Alignment. */
356 /* These are the four entries which correspond to the entries in the partition table. */
357} DLA_Table_Sector, *PDLA_Table_Sector;
358
359/* -------------------------- function prototypes -------------------------- */
360
361static inline unsigned long readl(void *a)
362{
363 return *(volatile unsigned long*)a;
364}
365
366static inline void writel(void *a, unsigned long v)
367{
368 *(volatile unsigned long*)a = v;
369}
370
371extern void shutdown_driver(void);
372
373/* os2ahci.c */
374extern USHORT init_drv(REQPACKET *req);
375extern USHORT gen_ioctl(REQPACKET *ioctl);
376extern USHORT char_dev_input(REQPACKET *rwrb);
377extern USHORT exit_drv(int func);
378extern USHORT sr_drv(int func);
379extern void add_entry(IORBH FAR16DATA *vIorb);
380extern void trigger_engine(void);
381extern int trigger_engine_1(void);
382extern void send_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb);
383extern void iocc_configuration (IORBH FAR16DATA *vIorb, IORBH *pIorb);
384extern void iocc_device_control(IORBH FAR16DATA *vIorb, IORBH *pIorb);
385extern void iocc_unit_control(IORBH FAR16DATA *vIorb, IORBH *pIorb);
386extern void iocm_device_table(IORBH FAR16DATA *vIorb, IORBH *pIorb);
387extern void iocc_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb);
388extern void iocc_execute_io(IORBH FAR16DATA *vIorb, IORBH *pIorb);
389extern void iocc_unit_status(IORBH FAR16DATA *vIorb, IORBH *pIorb);
390extern void iocc_adapter_passthru(IORBH FAR16DATA *vIorb, IORBH *pIorb);
391extern void iorb_queue_add(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb, IORBH *pIorb);
392extern int iorb_queue_del(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb);
393extern void iorb_seterr(IORBH *pIorb, USHORT error_code);
394extern void iorb_done(IORBH FAR16DATA *vIorb, IORBH *pIorb);
395extern void iorb_complete(IORBH FAR16DATA *vIorb, IORBH *pIorb);
396extern void iorb_requeue(IORBH *pIorb);
397extern void aws_free(ADD_WORKSPACE *aws);
398extern void lock_adapter(AD_INFO *ai);
399extern void unlock_adapter(AD_INFO *ai);
400extern void __syscall timeout_callback(ULONG timer_handle, ULONG p1);
401extern void __syscall reset_watchdog(ULONG timer_handle, ULONG p1);
402
403/* ahci.c */
404extern int ahci_config_caps(AD_INFO *ai);
405extern int ahci_save_bios_config(AD_INFO *ai);
406extern int ahci_restore_bios_config(AD_INFO *ai);
407extern int ahci_restore_initial_config(AD_INFO *ai);
408extern AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p);
409extern void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc);
410extern int ahci_enable_ahci(AD_INFO *ai);
411extern int ahci_scan_ports(AD_INFO *ai);
412extern int ahci_complete_init(AD_INFO *ai);
413extern int ahci_reset_port(AD_INFO *ai, int p, int ei);
414extern int ahci_start_port(AD_INFO *ai, int p, int ei);
415extern void ahci_start_fis_rx(AD_INFO *ai, int p);
416extern void ahci_start_engine(AD_INFO *ai, int p);
417extern int ahci_stop_port(AD_INFO *ai, int p);
418extern int ahci_stop_fis_rx(AD_INFO *ai, int p);
419extern int ahci_stop_engine(AD_INFO *ai, int p);
420extern int ahci_port_busy(AD_INFO *ai, int p);
421extern void ahci_exec_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int ncq_capable, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int));
422extern void ahci_exec_polled_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int), ULONG timeout);
423extern int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...);
424extern int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle);
425extern int ahci_flush_cache(AD_INFO *ai, int p, int d);
426
427extern int ahci_intr(u32 irq);
428extern void ahci_port_intr(AD_INFO *ai, int p);
429extern void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat);
430
431extern void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb);
432extern void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb);
433extern void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb);
434extern void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb);
435extern void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb);
436extern void ahci_execute_cdb(IORBH FAR16DATA *vIorb, IORBH *pIorb);
437extern void ahci_execute_ata(IORBH FAR16DATA *vIorb, IORBH *pIorb);
438extern void ahci_dump_host_regs(AD_INFO *ai, int bios_regs);
439extern void ahci_dump_port_regs(AD_INFO *ai, int p);
440extern int ahci_reset_controller(AD_INFO *ai);
441
442extern void sg_memcpy(SCATGATENTRY *sg_list, USHORT sg_cnt, ULONG sg_off, void *buf, USHORT len, SG_MEMCPY_DIRECTION dir);
443extern void panic(char *msg);
444
445/* trace.c */
446extern void build_user_info(void);
447
448/* pci.c */
449extern int add_pci_id(u16 vendor, u16 device);
450extern void scan_pci_bus(void);
451extern int pci_enable_int(USHORT BusDevFunc);
452extern void pci_hack_virtualbox(void);
453extern char *vendor_from_id(u16 vendor);
454extern char *device_from_id(u16 device);
455
456/* ctxhook.c */
457extern void _Syscall restart_ctxhook(ULONG parm);
458extern void _Syscall reset_ctxhook(ULONG parm);
459extern void _Syscall engine_ctxhook(ULONG parm);
460
461/* apm.c */
462extern void apm_init(void);
463extern void suspend(void);
464extern void resume(void);
465
466/* ioctl.c */
467extern USHORT ioctl_get_devlist(REQPACKET *ioctl);
468extern USHORT ioctl_passthrough(REQPACKET *ioctl);
469extern USHORT ioctl_gen_dsk(REQPACKET *ioctl);
470extern USHORT ioctl_smart(REQPACKET *ioctl);
471
472
473/* ---------------------------- global variables --------------------------- */
474
475extern int thorough_scan; /* if != 0, perform thorough PCI scan */
476extern int init_reset; /* if != 0, reset ports during init */
477extern int force_write_cache; /* if != 0, force write cache */
478extern int verbosity; /* if != 0, show some info during boot */
479extern int use_lvm_info;
480
481extern HDRIVER rm_drvh; /* resource manager driver handle */
482extern USHORT add_handle; /* adapter device driver handle */
483extern char drv_name[]; /* driver name as string ("OS2AHCI") */
484
485extern PCI_ID pci_ids[]; /* SATA adapter PCI IDs */
486extern SpinLock_t drv_lock; /* driver-level spinlock */
487extern ULONG com_lock; /* debug log spinlock */
488extern IORB_QUEUE driver_queue; /* driver-level IORB queue */
489extern AD_INFO ad_infos[]; /* adapter information list */
490extern int ad_info_cnt; /* number of entries in ad_infos[] */
491extern u16 ad_ignore; /* bitmap with adapters to be ignored */
492extern int init_complete; /* if != 0, initialization has completed */
493extern int suspended; /* indicates if the driver is suspended */
494extern int resume_sleep_flag;
495
496/* port restart context hook and input data */
497extern ULONG restart_ctxhook_h;
498extern volatile u32 ports_to_restart[MAX_AD];
499
500/* port reset context hook and input data */
501extern ULONG reset_ctxhook_h;
502extern ULONG th_reset_watchdog;
503extern volatile u32 ports_to_reset[MAX_AD];
504extern IORB_QUEUE abort_queue;
505
506/* trigger engine context hook and input data */
507extern ULONG engine_ctxhook_h;
508
509/* apapter/port-specific options saved when parsing the command line */
510extern u8 emulate_scsi[MAX_AD][AHCI_MAX_PORTS];
511extern u8 enable_ncq[MAX_AD][AHCI_MAX_PORTS];
512extern u8 link_speed[MAX_AD][AHCI_MAX_PORTS];
513extern u8 link_power[MAX_AD][AHCI_MAX_PORTS];
514extern u8 track_size[MAX_AD][AHCI_MAX_PORTS];
515extern u8 port_ignore[MAX_AD][AHCI_MAX_PORTS];
516
517#ifdef DEBUG
518extern void DumpIorb(IORBH *pIorb);
519#endif
520
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