| 1 | /******************************************************************************
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| 2 | * os2ahci.h - main header file for os2ahci driver
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| 3 | *
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| 4 | * Copyright (c) 2011 thi.guten Software Development
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| 5 | * Copyright (c) 2011 Mensys B.V.
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| 6 | * Copyright (c) 2013-2016 David Azarewicz
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| 7 | *
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| 8 | * Authors: Christian Mueller, Markus Thielen
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| 9 | *
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| 10 | * Parts copied from/inspired by the Linux AHCI driver;
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| 11 | * those parts are (c) Linux AHCI/ATA maintainers
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| 12 | *
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| 13 | * This program is free software; you can redistribute it and/or modify
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| 14 | * it under the terms of the GNU General Public License as published by
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| 15 | * the Free Software Foundation; either version 2 of the License, or
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| 16 | * (at your option) any later version.
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| 17 | *
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| 18 | * This program is distributed in the hope that it will be useful,
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| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 21 | * GNU General Public License for more details.
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| 22 | *
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| 23 | * You should have received a copy of the GNU General Public License
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| 24 | * along with this program; if not, write to the Free Software
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| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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| 26 | */
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| 27 |
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| 28 | /* ----------------------------- include files ----------------------------- */
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| 29 |
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| 30 | /* IMPORTANT NOTE: The DDK headers require tight structure packing and this
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| 31 | * is controlled via compiler parameters. Thus, all stuctures in os2ahci.add
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| 32 | * are expected to be byte-aligned without the need of explicit pragma pack()
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| 33 | * directives. Where possible, the structures are laid out such that words
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| 34 | * and dwords are aligned at least on 2-byte boundaries.
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| 35 | */
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| 36 |
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| 37 | /* Global feature defines
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| 38 | * DEBUG = enable debug logging routines to be compled in.
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| 39 | * LEGACY_APM = enable the legacy APM interface to be compiled in.
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| 40 | * Legacy APM support is not needed on eCS systems with ACPI and is more reliable without it enabled.
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| 41 | */
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| 42 | #define DEBUG
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| 43 | //#define LEGACY_APM
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| 44 |
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| 45 | #include "Dev32lib.h"
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| 46 | #include "Dev32rmcalls.h"
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| 47 | #include <Dev32iorb.h>
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| 48 | #include "ahci.h"
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| 49 | #include "ahci-idc.h"
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| 50 |
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| 51 | /* -------------------------- macros and constants ------------------------- */
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| 52 |
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| 53 | #define MAX_AD 8 /* maximum number of adapters */
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| 54 |
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| 55 | #define TIMER_COUNT 128
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| 56 |
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| 57 | /* default command timeout (can be overwritten in the IORB) */
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| 58 | #define DEFAULT_TIMEOUT 30000
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| 59 |
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| 60 | /* Maximum number of retries for commands in the restart/reset context hooks.
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| 61 | *
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| 62 | * Please note that the corresponding variable in the ADD workspace is a bit
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| 63 | * field, thus increasing this value means increasing the size of the bit
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| 64 | * field. At the time of writing this comment the 'retries' variable was 2
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| 65 | * bits wide (i.e. a maximum number of 3 retries) and there was exactly one
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| 66 | * bit left before the ADD workspace structure would become too large...
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| 67 | */
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| 68 | #define MAX_RETRIES 3
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| 69 |
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| 70 | /* debug output macros */
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| 71 | #ifdef DEBUG
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| 72 | #define DPRINTF(a,b,...) dprintf(a, b, ##__VA_ARGS__)
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| 73 | #define DHEXDUMP(a,b,c,d,...) dHexDump(a, b, c, d, ##__VA_ARGS__)
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| 74 | #define NTPRINTF(...) dprintf(0, ##__VA_ARGS__)
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| 75 | #define DUMP_HOST_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_host_regs(a,b);}
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| 76 | #define DUMP_PORT_REGS(l,a,b) {if (D32g_DbgLevel>=l) ahci_dump_port_regs(a,b);}
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| 77 | #else
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| 78 | #define DPRINTF(a,b,...)
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| 79 | #define DHEXDUMP(a,b,c,d,...)
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| 80 | #define NTPRINTF(a,...)
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| 81 | #define DUMP_HOST_REGS(a,b)
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| 82 | #define DUMP_PORT_REGS(l,a,b)
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| 83 | #endif
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| 84 |
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| 85 | /* verbosity console print macros
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| 86 | * (we use 'i' in ciprintf here to avoid name clash
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| 87 | * with vprintf-like funcs)
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| 88 | */
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| 89 | #define ciprintf(a,...) {if (verbosity > 0) iprintf(a, ##__VA_ARGS__);}
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| 90 | #define ciiprintf(a,...) {if (verbosity > 1) iprintf(a, ##__VA_ARGS__);}
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| 91 |
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| 92 | /* adapter number from AD_INFO pointer; mainly for dprintf() purposes */
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| 93 | #define ad_no(ai) ( ( (u32)ai - (u32)ad_infos ) / sizeof(*ai))
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| 94 |
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| 95 | #define MakeNear16PtrFromDiff(Base16, Base32, New32) \
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| 96 | ( ( CastFar16ToULONG(Base16) + ( (ULONG)(New32) - (ULONG)(Base32) ) ) & 0xffff)
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| 97 |
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| 98 | #define MakeFar16PtrFromDiff(Base16, Base32, New32) \
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| 99 | CastULONGToFar16(CastFar16ToULONG(Base16) + ((ULONG)(New32) - (ULONG)(Base32))))
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| 100 |
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| 101 | /* Takes the selector from the first parameter, and the offset specified
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| 102 | * in the second parameter, and returns a flat pointer
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| 103 | */
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| 104 | extern void *MakeFlatFromNear16(void __far16 *, USHORT);
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| 105 | #pragma aux MakeFlatFromNear16 = \
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| 106 | "mov ax, bx" \
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| 107 | "call Far16ToFlat" \
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| 108 | parm nomemory [eax] [bx] value [eax] modify nomemory exact [eax];
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| 109 |
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| 110 | /* stdarg.h macros with explicit far pointers */
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| 111 | typedef char *va_list;
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| 112 | #define va_start(va, last) va = (va_list) (&last + 1)
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| 113 | #define va_arg(va, type) ((type *) (va += sizeof(type)))[-1]
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| 114 | #define va_end(va) va = 0
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| 115 |
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| 116 | /* stddef macros */
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| 117 | #define offsetof(s, e) ((u32)&((s *)0)->e)
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| 118 |
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| 119 | /* shortcut macros */
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| 120 | #define spin_lock(sl) KernAcquireSpinLock(&sl)
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| 121 | #define spin_unlock(sl) KernReleaseSpinLock(&sl)
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| 122 |
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| 123 | /* Get AHCI port MMIO base from AD_INFO and port number. */
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| 124 | #define port_base(ai, p) ((u8 *) (ai)->mmio + 0x100 + (p) * 0x80)
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| 125 | #define port_dma_base(ai, p) ((AHCI_PORT_DMA *) ((ai)->dma_buf[(p)]))
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| 126 | #define port_dma_base_phys(ai, p) ((ai)->dma_buf_phys[(p)])
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| 127 |
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| 128 | /* Convert an SATA adapter/port/device address into a 16-bit IORB unit handle
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| 129 | * (and the other way round). The mapping looks like this:
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| 130 | *
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| 131 | * mapping comment
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| 132 | * -----------------------------------------------------------------------
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| 133 | * 4 bits for the adapter current max is 8 adapters
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| 134 | * 4 bits for the port AHCI spec defines up to 32 ports
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| 135 | * 4 bits for the device SATA spec defines up to 15 devices behind PMP
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| 136 | */
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| 137 | #define iorb_unit(a, p, d) ((((u16) (a) & 0x0fU) << 8) | \
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| 138 | (((u16) (p) & 0x0fU) << 4) | \
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| 139 | (((u16) (d) & 0x0fU)))
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| 140 | #define iorb_unit_adapter(iorb) (((iorb)->UnitHandle >> 8) & 0x07)
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| 141 | #define iorb_unit_port(iorb) (((iorb)->UnitHandle >> 4) & 0x0f)
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| 142 | #define iorb_unit_device(iorb) ((iorb)->UnitHandle & 0x0f)
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| 143 |
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| 144 | /*******************************************************************************
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| 145 | * Convenience macros for IORB processing functions
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| 146 | */
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| 147 | /* is this IORB on driver or port level? */
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| 148 | #define iorb_driver_level(iorb) ((iorb)->CommandCode == IOCC_CONFIGURATION)
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| 149 |
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| 150 | /* is this IORB to be inserted at the beginnig of the IORB queue? */
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| 151 | #define iorb_priority(iorb) ((iorb)->CommandCode == IOCC_DEVICE_CONTROL && \
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| 152 | (iorb)->CommandModifier == IOCM_ABORT))
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| 153 |
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| 154 | /* access IORB ADD workspace */
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| 155 | #define add_workspace(iorb) ((ADD_WORKSPACE *) &(iorb)->ADDWorkSpace)
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| 156 |
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| 157 |
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| 158 |
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| 159 | /******************************************************************************
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| 160 | * PCI generic IDs and macros
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| 161 | */
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| 162 | #define PCI_ANY_ID 0xffffU
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| 163 | #define PCI_VDEVICE(vendor, device) PCI_VENDOR_ID_##vendor, (device), \
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| 164 | PCI_ANY_ID, PCI_ANY_ID, 0, 0
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| 165 |
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| 166 | /******************************************************************************
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| 167 | * PCI vendor IDs for AHCI adapters known to this driver (copied from Linux
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| 168 | * pci_ids.h)
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| 169 | */
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| 170 | #define PCI_VENDOR_ID_AL 0x10b9
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| 171 | #define PCI_VENDOR_ID_AMD 0x1022
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| 172 | #define PCI_VENDOR_ID_AT 0x1259
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| 173 | #define PCI_VENDOR_ID_ATI 0x1002
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| 174 | #define PCI_VENDOR_ID_ATT 0x11c1
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| 175 | #define PCI_VENDOR_ID_CMD 0x1095
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| 176 | #define PCI_VENDOR_ID_CT 0x102c
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| 177 | #define PCI_VENDOR_ID_INTEL 0x8086
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| 178 | #define PCI_VENDOR_ID_INITIO 0x1101
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| 179 | #define PCI_VENDOR_ID_JMICRON 0x197B
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| 180 | #define PCI_VENDOR_ID_MARVELL 0x11ab
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| 181 | #define PCI_VENDOR_ID_NVIDIA 0x10de
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| 182 | #define PCI_VENDOR_ID_PROMISE 0x105a
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| 183 | #define PCI_VENDOR_ID_SI 0x1039
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| 184 | #define PCI_VENDOR_ID_VIA 0x1106
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| 185 |
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| 186 | /******************************************************************************
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| 187 | * PCI class IDs we're interested in (copied from Linux pci_ids.h)
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| 188 | */
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| 189 | #define PCI_BASE_CLASS_STORAGE 0x01
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| 190 | #define PCI_CLASS_STORAGE_SCSI 0x0100
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| 191 | #define PCI_CLASS_STORAGE_IDE 0x0101
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| 192 | #define PCI_CLASS_STORAGE_FLOPPY 0x0102
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| 193 | #define PCI_CLASS_STORAGE_IPI 0x0103
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| 194 | #define PCI_CLASS_STORAGE_RAID 0x0104
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| 195 | #define PCI_CLASS_STORAGE_SATA 0x0106
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| 196 | #define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
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| 197 | #define PCI_CLASS_STORAGE_SAS 0x0107
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| 198 | #define PCI_CLASS_STORAGE_OTHER 0x0180
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| 199 |
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| 200 | /******************************************************************************
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| 201 | * ANSI color code constants
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| 202 | */
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| 203 | #define ANSI_CLR_BRIGHT "\x1b[1m"
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| 204 | #define ANSI_CLR_RED "\x1b[31m"
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| 205 | #define ANSI_CLR_GREEN "\x1b[32m"
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| 206 | #define ANSI_CLR_BLUE "\x1b[34m"
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| 207 | #define ANSI_CLR_CYAN "\x1b[36m"
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| 208 | #define ANSI_CLR_WHITE "\x1b[37m"
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| 209 | #define ANSI_RESET "\x1b[0m"
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| 210 |
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| 211 |
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| 212 | /* ------------------------ typedefs and structures ------------------------ */
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| 213 |
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| 214 | /* PCI device information structure; this is used both for scanning and for
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| 215 | * identification purposes in 'AD_INFO'; based on the Linux pci_device_id
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| 216 | * structure but hard-wired to use board_* constants for 'driver_data'
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| 217 | */
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| 218 | typedef struct {
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| 219 | u16 vendor; /* PCI device vendor/manufacturer */
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| 220 | u16 device; /* PCI device ID inside vendor scope */
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| 221 | u16 subvendor; /* subsystem vendor (unused so far) */
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| 222 | u16 subdevice; /* subsystem device (unused so far) */
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| 223 | u32 class; /* PCI device class */
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| 224 | u32 class_mask; /* bits to match when scanning for 'class' */
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| 225 | u32 board; /* AHCI controller board type (board_* constants) */
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| 226 | char *chipname; /* human readable chip ID string */
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| 227 | } PCI_ID;
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| 228 |
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| 229 | /* IORB queue; since IORB queues are updated at interrupt time, the
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| 230 | * corresponding pointers (not the data they point to) need to be volatile.
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| 231 | */
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| 232 | typedef struct {
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| 233 | IORBH FAR16DATA *volatile vRoot; /* root of request list */
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| 234 | IORBH FAR16DATA *volatile vTail; /* tail of request list */
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| 235 | } IORB_QUEUE;
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| 236 |
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| 237 | typedef struct {
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| 238 | USHORT Cylinders;
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| 239 | USHORT HeadsPerCylinder;
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| 240 | USHORT SectorsPerTrack;
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| 241 | ULONG TotalSectors;
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| 242 | char *Method;
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| 243 | } DEV_INFO;
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| 244 |
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| 245 | /* port information structure */
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| 246 | typedef struct {
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| 247 | IORB_QUEUE iorb_queue; /* IORB queue for this port */
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| 248 | unsigned dev_max : 4; /* maximum device number on this port (0..AHCI_MAX_DEVS-1) */
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| 249 | unsigned cmd_slot : 5; /* current command slot index (using round-
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| 250 | * robin indexes to prevent starvation) */
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| 251 |
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| 252 | volatile u32 ncq_cmds; /* bitmap for NCQ commands issued */
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| 253 | volatile u32 reg_cmds; /* bitmap for regular commands issued */
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| 254 |
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| 255 | struct {
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| 256 | unsigned allocated :1; /* if != 0, device is allocated */
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| 257 | unsigned present :1; /* if != 0, device is present */
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| 258 | unsigned lba48 :1; /* if != 0, device supports 48-bit LBA */
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| 259 | unsigned atapi :1; /* if != 0, this is an ATAPI device */
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| 260 | unsigned atapi_16 :1; /* if != 0, device suports 16-byte cmds */
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| 261 | unsigned removable :1; /* if != 0, device has removable media */
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| 262 | unsigned dev_type :5; /* device type (UIB_TYPE_* in iorb.h) */
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| 263 | unsigned ncq_max :5; /* maximum tag number for queued commands */
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| 264 | UNITINFO *unit_info; /* pointer to modified unit info */
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| 265 | DEV_INFO dev_info;
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| 266 | } devs[AHCI_MAX_DEVS];
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| 267 | } P_INFO;
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| 268 |
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| 269 | /* adapter information structure */
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| 270 | typedef struct {
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| 271 | PCI_ID *pci; /* pointer to corresponding PCI ID */
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| 272 |
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| 273 | unsigned port_max : 5; /* maximum port number (0..AHCI_MAX_PORTS-1) */
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| 274 | unsigned cmd_max : 5; /* maximum cmd slot number (0-31) */
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| 275 | unsigned port_scan_done : 1; /* if != 0, port scan already done */
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| 276 | unsigned busy : 1; /* if != 0, adapter is busy */
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| 277 |
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| 278 | unsigned hw_ports : 6; /* number of ports as reported by the hardware */
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| 279 |
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| 280 | u32 port_map; /* bitmap of active ports */
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| 281 | u16 pci_vendor;
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| 282 | u16 pci_device;
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| 283 |
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| 284 | /* initial adapter configuration from BIOS */
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| 285 | u32 bios_config[HOST_CAP2 / sizeof(u32) + 1];
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| 286 |
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| 287 | u32 cap; /* working copy of CAP register */
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| 288 | u32 cap2; /* working copy of CAP2 register */
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| 289 | u32 flags; /* adapter flags */
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| 290 |
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| 291 | HRESOURCE rm_adh; /* resource handle for adapter */
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| 292 | HRESOURCE rm_bars[6]; /* resource handle for MMIO and I/O BARs */
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| 293 | HRESOURCE rm_irq; /* resource handle for IRQ */
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| 294 |
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| 295 | u16 bus_dev_func; /* PCI bus number PCI device and function number */
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| 296 | u16 irq; /* interrupt number */
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| 297 |
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| 298 | u32 mmio_phys; /* physical address of MMIO region */
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| 299 | u32 mmio_size; /* size of MMIO region */
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| 300 | u8 *mmio; /* pointer to this adapter's MMIO region */
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| 301 |
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| 302 | u32 dma_buf_phys[AHCI_MAX_PORTS]; /* physical address of DMA scratch buffer */
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| 303 | u8 *dma_buf[AHCI_MAX_PORTS]; /* DMA scatch buffers */
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| 304 |
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| 305 | P_INFO ports[AHCI_MAX_PORTS]; /* SATA ports on this adapter */
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| 306 | } AD_INFO;
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| 307 |
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| 308 | /* ADD workspace in IORB (must not exceed 16 bytes) */
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| 309 | typedef struct {
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| 310 | void (*ppfunc)(IORBH FAR16DATA *vIorb, IORBH *pIorb); /* 00 post-processing function */
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| 311 | void *buf; /* 04 response buffer (e.g. for identify cmds) */
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| 312 | ULONG timer; /* 08 timer for timeout procesing */
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| 313 | USHORT blocks; /* 0c number of blocks to be transferred */
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| 314 | unsigned short processing :1; /* 0e IORB is being processd */
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| 315 | unsigned short idempotent :1; /* IORB is idempotent (can be retried) */
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| 316 | unsigned short queued_hw :1; /* IORB has been queued to hardware */
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| 317 | unsigned short no_ncq :1; /* must not use native command queuing */
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| 318 | unsigned short is_ncq :1; /* should use native command queueing */
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| 319 | unsigned short complete :1; /* IORB has completed processing */
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| 320 | unsigned short unaligned :1; /* unaligned S/G; need to use transfer buffer */
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| 321 | unsigned short retries :2; /* number of retries for this command */
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| 322 | unsigned short cmd_slot :5; /* AHCI command slot for this IORB */
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| 323 | } ADD_WORKSPACE; /* 10 */
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| 324 |
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| 325 | /* sg_memcpy() direction */
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| 326 | typedef enum {
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| 327 | SG_TO_BUF, /* copy from S/G list to buffer */
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| 328 | BUF_TO_SG /* copy from buffer to S/G list */
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| 329 | } SG_MEMCPY_DIRECTION;
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| 330 |
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| 331 | /* Define the size of a disk name. Disk Names are user defined names given to physical disk drives in the system. */
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| 332 | #define DLA_TABLE_SIGNATURE1 0x424D5202L
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| 333 | #define DLA_TABLE_SIGNATURE2 0x44464D50L
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| 334 | #define DISK_NAME_SIZE 20
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| 335 |
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| 336 | typedef struct _DLA_Table_Sector { /* DTS */
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| 337 | ULONG DLA_Signature1; /* The magic signature (part 1) of a Drive Letter Assignment Table. */
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| 338 | ULONG DLA_Signature2; /* The magic signature (part 2) of a Drive Letter Assignment Table. */
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| 339 | ULONG DLA_CRC; /* The 32 bit CRC for this sector. Calculated assuming that this field and all unused space in the sector is 0. */
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| 340 | ULONG Disk_Serial_Number; /* The serial number assigned to this disk. */
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| 341 | ULONG Boot_Disk_Serial_Number;/* The serial number of the disk used to boot the system. This is for conflict resolution when multiple volumes
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| 342 | want the same drive letter. Since LVM.EXE will not let this situation happen, the only way to get this situation
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| 343 | is for the disk to have been altered by something other than LVM.EXE, or if a disk drive has been moved from one
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| 344 | machine to another. If the drive has been moved, then it should have a different Boot_Disk_Serial_Number. Thus,
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| 345 | we can tell which disk drive is the "foreign" drive and therefore reject its claim for the drive letter in question.
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| 346 | If we find that all of the claimaints have the same Boot_Disk_Serial_Number, then we must assign drive letters on
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| 347 | a first come, first serve basis. */
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| 348 | ULONG Install_Flags; /* Used by the Install program. */
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| 349 | ULONG Cylinders;
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| 350 | ULONG Heads_Per_Cylinder;
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| 351 | ULONG Sectors_Per_Track;
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| 352 | char Disk_Name[DISK_NAME_SIZE]; /* The name assigned to the disk containing this sector. */
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| 353 | UCHAR Reboot; /* For use by Install. Used to keep track of reboots initiated by install. */
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| 354 | BYTE Reserved[3]; /* Alignment. */
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| 355 | /* These are the four entries which correspond to the entries in the partition table. */
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| 356 | } DLA_Table_Sector, *PDLA_Table_Sector;
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| 357 |
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| 358 | /* -------------------------- function prototypes -------------------------- */
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| 359 |
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| 360 | static inline unsigned long readl(void *a)
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| 361 | {
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| 362 | return *(volatile unsigned long*)a;
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| 363 | }
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| 364 |
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| 365 | static inline void writel(void *a, unsigned long v)
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| 366 | {
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| 367 | *(volatile unsigned long*)a = v;
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| 368 | }
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| 369 |
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| 370 | extern void shutdown_driver(void);
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| 371 |
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| 372 | /* os2ahci.c */
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| 373 | extern USHORT init_drv(REQPACKET *req);
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| 374 | extern USHORT gen_ioctl(REQPACKET *ioctl);
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| 375 | extern USHORT char_dev_input(REQPACKET *rwrb);
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| 376 | extern USHORT exit_drv(int func);
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| 377 | extern USHORT sr_drv(int func);
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| 378 | extern void add_entry(IORBH FAR16DATA *vIorb);
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| 379 | extern void trigger_engine(void);
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| 380 | extern int trigger_engine_1(void);
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| 381 | extern void send_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb);
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| 382 | extern void iocc_configuration (IORBH FAR16DATA *vIorb, IORBH *pIorb);
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| 383 | extern void iocc_device_control(IORBH FAR16DATA *vIorb, IORBH *pIorb);
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| 384 | extern void iocc_unit_control(IORBH FAR16DATA *vIorb, IORBH *pIorb);
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| 385 | extern void iocm_device_table(IORBH FAR16DATA *vIorb, IORBH *pIorb);
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| 386 | extern void iocc_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 387 | extern void iocc_execute_io(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 388 | extern void iocc_unit_status(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 389 | extern void iocc_adapter_passthru(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 390 | extern void iorb_queue_add(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 391 | extern int iorb_queue_del(IORB_QUEUE *queue, IORBH FAR16DATA *vIorb);
|
|---|
| 392 | extern void iorb_seterr(IORBH *pIorb, USHORT error_code);
|
|---|
| 393 | extern void iorb_done(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 394 | extern void iorb_complete(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 395 | extern void iorb_requeue(IORBH *pIorb);
|
|---|
| 396 | extern void aws_free(ADD_WORKSPACE *aws);
|
|---|
| 397 | extern void lock_adapter(AD_INFO *ai);
|
|---|
| 398 | extern void unlock_adapter(AD_INFO *ai);
|
|---|
| 399 | extern void __syscall timeout_callback(ULONG timer_handle, ULONG p1);
|
|---|
| 400 | extern void __syscall reset_watchdog(ULONG timer_handle, ULONG p1);
|
|---|
| 401 |
|
|---|
| 402 | /* ahci.c */
|
|---|
| 403 | extern int ahci_save_bios_config(AD_INFO *ai);
|
|---|
| 404 | extern int ahci_restore_bios_config(AD_INFO *ai);
|
|---|
| 405 | extern int ahci_restore_initial_config(AD_INFO *ai);
|
|---|
| 406 | extern AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p);
|
|---|
| 407 | extern void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc);
|
|---|
| 408 | extern int ahci_enable_ahci(AD_INFO *ai);
|
|---|
| 409 | extern int ahci_scan_ports(AD_INFO *ai);
|
|---|
| 410 | extern int ahci_complete_init(AD_INFO *ai);
|
|---|
| 411 | extern int ahci_reset_port(AD_INFO *ai, int p, int ei);
|
|---|
| 412 | extern int ahci_start_port(AD_INFO *ai, int p, int ei);
|
|---|
| 413 | extern void ahci_start_fis_rx(AD_INFO *ai, int p);
|
|---|
| 414 | extern void ahci_start_engine(AD_INFO *ai, int p);
|
|---|
| 415 | extern int ahci_stop_port(AD_INFO *ai, int p);
|
|---|
| 416 | extern int ahci_stop_fis_rx(AD_INFO *ai, int p);
|
|---|
| 417 | extern int ahci_stop_engine(AD_INFO *ai, int p);
|
|---|
| 418 | extern int ahci_port_busy(AD_INFO *ai, int p);
|
|---|
| 419 | extern void ahci_exec_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int ncq_capable, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int));
|
|---|
| 420 | extern void ahci_exec_polled_iorb(IORBH FAR16DATA *vIorb, IORBH *pIorb, int (*func)(IORBH FAR16DATA *, IORBH *pIorb, int), ULONG timeout);
|
|---|
| 421 | extern int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...);
|
|---|
| 422 | extern int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle);
|
|---|
| 423 | extern int ahci_flush_cache(AD_INFO *ai, int p, int d);
|
|---|
| 424 |
|
|---|
| 425 | extern int ahci_intr(u16 irq);
|
|---|
| 426 | extern void ahci_port_intr(AD_INFO *ai, int p);
|
|---|
| 427 | extern void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat);
|
|---|
| 428 |
|
|---|
| 429 | extern void ahci_get_geometry(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 430 | extern void ahci_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 431 | extern void ahci_read(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 432 | extern void ahci_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 433 | extern void ahci_write(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 434 | extern void ahci_execute_cdb(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 435 | extern void ahci_execute_ata(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 436 | extern void ahci_dump_host_regs(AD_INFO *ai, int bios_regs);
|
|---|
| 437 | extern void ahci_dump_port_regs(AD_INFO *ai, int p);
|
|---|
| 438 | extern int ahci_reset_controller(AD_INFO *ai);
|
|---|
| 439 |
|
|---|
| 440 | extern void sg_memcpy(SCATGATENTRY *sg_list, USHORT sg_cnt, ULONG sg_off, void *buf, USHORT len, SG_MEMCPY_DIRECTION dir);
|
|---|
| 441 | extern void panic(char *msg);
|
|---|
| 442 |
|
|---|
| 443 | /* trace.c */
|
|---|
| 444 | extern void build_user_info(void);
|
|---|
| 445 |
|
|---|
| 446 | /* pci.c */
|
|---|
| 447 | extern int add_pci_id(u16 vendor, u16 device);
|
|---|
| 448 | extern void scan_pci_bus(void);
|
|---|
| 449 | extern int pci_enable_int(USHORT BusDevFunc);
|
|---|
| 450 | extern void pci_hack_virtualbox(void);
|
|---|
| 451 | extern char *vendor_from_id(u16 vendor);
|
|---|
| 452 | extern char *device_from_id(u16 device);
|
|---|
| 453 |
|
|---|
| 454 | /* ctxhook.c */
|
|---|
| 455 | extern void _Syscall restart_ctxhook(ULONG parm);
|
|---|
| 456 | extern void _Syscall reset_ctxhook(ULONG parm);
|
|---|
| 457 | extern void _Syscall engine_ctxhook(ULONG parm);
|
|---|
| 458 |
|
|---|
| 459 | /* apm.c */
|
|---|
| 460 | extern void apm_init(void);
|
|---|
| 461 | extern void suspend(void);
|
|---|
| 462 | extern void resume(void);
|
|---|
| 463 |
|
|---|
| 464 | /* ioctl.c */
|
|---|
| 465 | extern USHORT ioctl_get_devlist(REQPACKET *ioctl);
|
|---|
| 466 | extern USHORT ioctl_passthrough(REQPACKET *ioctl);
|
|---|
| 467 | extern USHORT ioctl_gen_dsk(REQPACKET *ioctl);
|
|---|
| 468 | extern USHORT ioctl_smart(REQPACKET *ioctl);
|
|---|
| 469 |
|
|---|
| 470 |
|
|---|
| 471 | /* ---------------------------- global variables --------------------------- */
|
|---|
| 472 |
|
|---|
| 473 | extern int thorough_scan; /* if != 0, perform thorough PCI scan */
|
|---|
| 474 | extern int init_reset; /* if != 0, reset ports during init */
|
|---|
| 475 | extern int force_write_cache; /* if != 0, force write cache */
|
|---|
| 476 | extern int verbosity; /* if != 0, show some info during boot */
|
|---|
| 477 | extern int use_lvm_info;
|
|---|
| 478 |
|
|---|
| 479 | extern HDRIVER rm_drvh; /* resource manager driver handle */
|
|---|
| 480 | extern USHORT add_handle; /* adapter device driver handle */
|
|---|
| 481 | extern char drv_name[]; /* driver name as string ("OS2AHCI") */
|
|---|
| 482 |
|
|---|
| 483 | extern PCI_ID pci_ids[]; /* SATA adapter PCI IDs */
|
|---|
| 484 | extern SpinLock_t drv_lock; /* driver-level spinlock */
|
|---|
| 485 | extern ULONG com_lock; /* debug log spinlock */
|
|---|
| 486 | extern IORB_QUEUE driver_queue; /* driver-level IORB queue */
|
|---|
| 487 | extern AD_INFO ad_infos[]; /* adapter information list */
|
|---|
| 488 | extern int ad_info_cnt; /* number of entries in ad_infos[] */
|
|---|
| 489 | extern u16 ad_ignore; /* bitmap with adapters to be ignored */
|
|---|
| 490 | extern int init_complete; /* if != 0, initialization has completed */
|
|---|
| 491 | extern int suspended; /* indicates if the driver is suspended */
|
|---|
| 492 | extern int resume_sleep_flag;
|
|---|
| 493 |
|
|---|
| 494 | /* port restart context hook and input data */
|
|---|
| 495 | extern ULONG restart_ctxhook_h;
|
|---|
| 496 | extern volatile u32 ports_to_restart[MAX_AD];
|
|---|
| 497 |
|
|---|
| 498 | /* port reset context hook and input data */
|
|---|
| 499 | extern ULONG reset_ctxhook_h;
|
|---|
| 500 | extern ULONG th_reset_watchdog;
|
|---|
| 501 | extern volatile u32 ports_to_reset[MAX_AD];
|
|---|
| 502 | extern IORB_QUEUE abort_queue;
|
|---|
| 503 |
|
|---|
| 504 | /* trigger engine context hook and input data */
|
|---|
| 505 | extern ULONG engine_ctxhook_h;
|
|---|
| 506 |
|
|---|
| 507 | /* apapter/port-specific options saved when parsing the command line */
|
|---|
| 508 | extern u8 emulate_scsi[MAX_AD][AHCI_MAX_PORTS];
|
|---|
| 509 | extern u8 enable_ncq[MAX_AD][AHCI_MAX_PORTS];
|
|---|
| 510 | extern u8 link_speed[MAX_AD][AHCI_MAX_PORTS];
|
|---|
| 511 | extern u8 link_power[MAX_AD][AHCI_MAX_PORTS];
|
|---|
| 512 | extern u8 track_size[MAX_AD][AHCI_MAX_PORTS];
|
|---|
| 513 | extern u8 port_ignore[MAX_AD][AHCI_MAX_PORTS];
|
|---|
| 514 |
|
|---|
| 515 | #ifdef DEBUG
|
|---|
| 516 | extern void DumpIorb(IORBH *pIorb);
|
|---|
| 517 | #endif
|
|---|
| 518 |
|
|---|
