| 1 | /******************************************************************************
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| 2 | * ata.h - ATA structures and macros for os2ahci driver
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| 3 | *
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| 4 | * Copyright (c) 2011 thi.guten Software Development
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| 5 | * Copyright (c) 2011 Mensys B.V.
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| 6 | * Copyright (c) 2013-2016 David Azarewicz
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| 7 | *
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| 8 | * Authors: Christian Mueller, Markus Thielen
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| 9 | *
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| 10 | * Parts copied from/inspired by the Linux AHCI driver;
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| 11 | * those parts are (c) Linux AHCI/ATA maintainers
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| 12 | *
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| 13 | * This program is free software; you can redistribute it and/or modify
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| 14 | * it under the terms of the GNU General Public License as published by
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| 15 | * the Free Software Foundation; either version 2 of the License, or
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| 16 | * (at your option) any later version.
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| 17 | *
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| 18 | * This program is distributed in the hope that it will be useful,
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| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 21 | * GNU General Public License for more details.
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| 22 | *
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| 23 | * You should have received a copy of the GNU General Public License
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| 24 | * along with this program; if not, write to the Free Software
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| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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| 26 | */
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| 27 |
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| 28 | /* -------------------------- macros and constants ------------------------- */
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| 29 |
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| 30 | /******************************************************************************
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| 31 | * Right now, os2ahci uses a fixed sector size of 512 bytes for hard disks.
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| 32 | * This may change in the future...
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| 33 | */
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| 34 | #define ATA_SECTOR_SIZE 512
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| 35 |
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| 36 | /******************************************************************************
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| 37 | * Macros to access geometry values in the ATA ID buffer
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| 38 | */
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| 39 | #define ATA_CYLS(id_buf) *((u16 *) (id_buf + ATA_ID_CYLS))
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| 40 | #define ATA_HEADS(id_buf) *((u16 *) (id_buf + ATA_ID_HEADS))
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| 41 | #define ATA_SECTORS(id_buf) *((u16 *) (id_buf + ATA_ID_SECTORS))
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| 42 | #define ATA_CAPACITY(id_buf) *((u32 *) (id_buf + ATA_ID_LBA_CAPACITY))
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| 43 |
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| 44 | #define ATA_CAPACITY48_L(id_buf) *((u32 *) (id_buf + ATA_ID_LBA_CAPACITY_2))
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| 45 | #define ATA_CAPACITY48_H(id_buf) *((u32 *) (id_buf + ATA_ID_LBA_CAPACITY_2 + 2))
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| 46 |
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| 47 | #define CUR_CYLS(id_buf) *((u16 *) (id_buf + ATA_ID_CUR_CYLS))
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| 48 | #define CUR_HEADS(id_buf) *((u16 *) (id_buf + ATA_ID_CUR_HEADS))
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| 49 | #define CUR_SECTORS(id_buf) *((u16 *) (id_buf + ATA_ID_CUR_SECTORS))
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| 50 | #define CUR_CAPACITY(id_buf) *((u32 *) (id_buf + ATA_ID_CUR_CAPACITY))
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| 51 |
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| 52 |
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| 53 | /******************************************************************************
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| 54 | * ATA IDENTIFY offsets and constants. The ATA IDENTIFY response is a bit of a
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| 55 | * mess and after struggling to put this into some structure, I discovered the
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| 56 | * Linux folks simply defined offsets and constants to those fields which are
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| 57 | * actually needed. Thus, I copied the relevant bits from ata.h, replacing
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| 58 | * the enum with precompiler definitions because our enums are signed 16 bits.
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| 59 | *
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| 60 | * Please note that strings such as the product name are stored using byte-
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| 61 | * swapped 16-bit words.
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| 62 | */
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| 63 | #define ATA_ID_WORDS 256
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| 64 | #define ATA_ID_CONFIG 0
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| 65 | #define ATA_ID_CYLS 1
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| 66 | #define ATA_ID_HEADS 3
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| 67 | #define ATA_ID_SECTORS 6
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| 68 | #define ATA_ID_SERNO 10
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| 69 | #define ATA_ID_BUF_SIZE 21
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| 70 | #define ATA_ID_FW_REV 23
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| 71 | #define ATA_ID_PROD 27
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| 72 | #define ATA_ID_MAX_MULTSECT 47
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| 73 | #define ATA_ID_DWORD_IO 48
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| 74 | #define ATA_ID_CAPABILITY 49
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| 75 | #define ATA_ID_OLD_PIO_MODES 51
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| 76 | #define ATA_ID_OLD_DMA_MODES 52
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| 77 | #define ATA_ID_FIELD_VALID 53
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| 78 | #define ATA_ID_CUR_CYLS 54
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| 79 | #define ATA_ID_CUR_HEADS 55
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| 80 | #define ATA_ID_CUR_SECTORS 56
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| 81 | #define ATA_ID_CUR_CAPACITY 57
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| 82 | #define ATA_ID_MULTSECT 59
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| 83 | #define ATA_ID_LBA_CAPACITY 60
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| 84 | #define ATA_ID_SWDMA_MODES 62
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| 85 | #define ATA_ID_MWDMA_MODES 63
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| 86 | #define ATA_ID_PIO_MODES 64
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| 87 | #define ATA_ID_EIDE_DMA_MIN 65
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| 88 | #define ATA_ID_EIDE_DMA_TIME 66
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| 89 | #define ATA_ID_EIDE_PIO 67
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| 90 | #define ATA_ID_EIDE_PIO_IORDY 68
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| 91 | #define ATA_ID_ADDITIONAL_SUPP 69
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| 92 | #define ATA_ID_QUEUE_DEPTH 75
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| 93 | #define ATA_ID_MAJOR_VER 80
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| 94 | #define ATA_ID_COMMAND_SET_1 82
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| 95 | #define ATA_ID_COMMAND_SET_2 83
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| 96 | #define ATA_ID_CFSSE 84
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| 97 | #define ATA_ID_CFSSE 84
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| 98 | #define ATA_ID_CFS_ENABLE_1 85
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| 99 | #define ATA_ID_CFS_ENABLE_2 86
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| 100 | #define ATA_ID_CSF_DEFAULT 87
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| 101 | #define ATA_ID_UDMA_MODES 88
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| 102 | #define ATA_ID_HW_CONFIG 93
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| 103 | #define ATA_ID_SPG 98
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| 104 | #define ATA_ID_LBA_CAPACITY_2 100
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| 105 | #define ATA_ID_SECTOR_SIZE 106
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| 106 | #define ATA_ID_LAST_LUN 126
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| 107 | #define ATA_ID_DLF 128
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| 108 | #define ATA_ID_CSFO 129
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| 109 | #define ATA_ID_CFA_POWER 160
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| 110 | #define ATA_ID_CFA_KEY_MGMT 162
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| 111 | #define ATA_ID_CFA_MODES 163
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| 112 | #define ATA_ID_DATA_SET_MGMT 169
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| 113 | #define ATA_ID_ROT_SPEED 217
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| 114 | #define ATA_ID_PIO4 (1U << 1)
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| 115 |
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| 116 | #define ATA_ID_SERNO_LEN 20
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| 117 | #define ATA_ID_FW_REV_LEN 8
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| 118 | #define ATA_ID_PROD_LEN 40
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| 119 |
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| 120 | #define ATA_PCI_CTL_OFS 2
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| 121 |
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| 122 | #define ATA_PIO0 (1U << 0)
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| 123 | #define ATA_PIO1 ATA_PIO0 | (1U << 1)
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| 124 | #define ATA_PIO2 ATA_PIO1 | (1U << 2)
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| 125 | #define ATA_PIO3 ATA_PIO2 | (1U << 3)
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| 126 | #define ATA_PIO4 ATA_PIO3 | (1U << 4)
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| 127 | #define ATA_PIO5 ATA_PIO4 | (1U << 5)
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| 128 | #define ATA_PIO6 ATA_PIO5 | (1U << 6)
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| 129 |
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| 130 | #define ATA_PIO4_ONLY (1U << 4)
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| 131 |
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| 132 | #define ATA_SWDMA0 (1U << 0)
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| 133 | #define ATA_SWDMA1 ATA_SWDMA0 | (1U << 1)
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| 134 | #define ATA_SWDMA2 ATA_SWDMA1 | (1U << 2)
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| 135 |
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| 136 | #define ATA_SWDMA2_ONLY (1U << 2)
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| 137 |
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| 138 | #define ATA_MWDMA0 (1U << 0)
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| 139 | #define ATA_MWDMA1 ATA_MWDMA0 | (1U << 1)
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| 140 | #define ATA_MWDMA2 ATA_MWDMA1 | (1U << 2)
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| 141 | #define ATA_MWDMA3 ATA_MWDMA2 | (1U << 3)
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| 142 | #define ATA_MWDMA4 ATA_MWDMA3 | (1U << 4)
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| 143 |
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| 144 | #define ATA_MWDMA12_ONLY (1U << 1) | (1U << 2)
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| 145 | #define ATA_MWDMA2_ONLY (1U << 2)
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| 146 |
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| 147 | #define ATA_UDMA0 (1U << 0)
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| 148 | #define ATA_UDMA1 ATA_UDMA0 | (1U << 1)
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| 149 | #define ATA_UDMA2 ATA_UDMA1 | (1U << 2)
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| 150 | #define ATA_UDMA3 ATA_UDMA2 | (1U << 3)
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| 151 | #define ATA_UDMA4 ATA_UDMA3 | (1U << 4)
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| 152 | #define ATA_UDMA5 ATA_UDMA4 | (1U << 5)
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| 153 | #define ATA_UDMA6 ATA_UDMA5 | (1U << 6)
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| 154 |
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| 155 | /******************************************************************************
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| 156 | * Miscellanous constants copied from the Linux LIBATA code. Again, the enums
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| 157 | * have been converted to preprocessor definitions to avoid problems with
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| 158 | * signed 16-bit integers.
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| 159 | *
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| 160 | * Please note that Linux supports all kinds of IDE/EIDE/ATA/SATA/... devices
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| 161 | * in LIBATA while we only need the ATA-8 bits, and those only as far as they
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| 162 | * are relevant to AHCI.
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| 163 | */
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| 164 |
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| 165 | /* bits in ATA command block registers */
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| 166 | #define ATA_HOB (1U << 7) /* LBA48 selector */
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| 167 | #define ATA_NIEN (1U << 1) /* disable-irq flag */
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| 168 | #define ATA_LBA (1U << 6) /* LBA28 selector */
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| 169 | #define ATA_DEV1 (1U << 4) /* Select Device 1 (slave) */
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| 170 | #define ATA_DEVICE_OBS (1U << 7) | (1U << 5) /* obs bits in dev reg */
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| 171 | #define ATA_DEVCTL_OBS (1U << 3) /* obsolete bit in devctl reg */
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| 172 | #define ATA_BUSY (1U << 7) /* BSY status bit */
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| 173 | #define ATA_DRDY (1U << 6) /* device ready */
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| 174 | #define ATA_DF (1U << 5) /* device fault */
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| 175 | #define ATA_DSC (1U << 4) /* drive seek complete */
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| 176 | #define ATA_DRQ (1U << 3) /* data request i/o */
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| 177 | #define ATA_CORR (1U << 2) /* corrected data error */
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| 178 | #define ATA_IDX (1U << 1) /* index */
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| 179 | #define ATA_ERR (1U << 0) /* have an error */
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| 180 | #define ATA_SRST (1U << 2) /* software reset */
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| 181 | #define ATA_ICRC (1U << 7) /* interface CRC error */
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| 182 | #define ATA_BBK ATA_ICRC /* pre-EIDE: block marked bad */
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| 183 | #define ATA_UNC (1U << 6) /* uncorrectable media error */
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| 184 | #define ATA_MC (1U << 5) /* media changed */
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| 185 | #define ATA_IDNF (1U << 4) /* ID not found */
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| 186 | #define ATA_MCR (1U << 3) /* media change requested */
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| 187 | #define ATA_ABORTED (1U << 2) /* command aborted */
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| 188 | #define ATA_TRK0NF (1U << 1) /* track 0 not found */
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| 189 | #define ATA_AMNF (1U << 0) /* address mark not found */
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| 190 | #define ATAPI_LFS 0xF0U /* last failed sense */
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| 191 | #define ATAPI_EOM ATA_TRK0NF /* end of media */
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| 192 | #define ATAPI_ILI ATA_AMNF /* illegal length indication */
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| 193 | #define ATAPI_IO (1U << 1)
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| 194 | #define ATAPI_COD (1U << 0)
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| 195 |
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| 196 | /* ATA device commands */
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| 197 | #define ATA_CMD_DEV_RESET 0x08 /* ATAPI device reset */
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| 198 | #define ATA_CMD_CHK_POWER 0xE5 /* check power mode */
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| 199 | #define ATA_CMD_STANDBY 0xE2 /* place in standby power mode */
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| 200 | #define ATA_CMD_IDLE 0xE3 /* place in idle power mode */
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| 201 | #define ATA_CMD_EDD 0x90 /* execute device diagnostic */
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| 202 | #define ATA_CMD_DOWNLOAD_MICRO 0x92
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| 203 | #define ATA_CMD_NOP 0x00
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| 204 | #define ATA_CMD_FLUSH 0xE7
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| 205 | #define ATA_CMD_FLUSH_EXT 0xEA
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| 206 | #define ATA_CMD_ID_ATA 0xEC
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| 207 | #define ATA_CMD_ID_ATAPI 0xA1
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| 208 | #define ATA_CMD_SERVICE 0xA2
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| 209 | #define ATA_CMD_READ 0xC8
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| 210 | #define ATA_CMD_READ_EXT 0x25
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| 211 | #define ATA_CMD_READ_QUEUED 0x26
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| 212 | #define ATA_CMD_READ_STREAM_EXT 0x2B
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| 213 | #define ATA_CMD_READ_STREAM_DMA_EXT 0x2A
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| 214 | #define ATA_CMD_WRITE 0xCA
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| 215 | #define ATA_CMD_WRITE_EXT 0x35
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| 216 | #define ATA_CMD_WRITE_QUEUED 0x36
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| 217 | #define ATA_CMD_WRITE_STREAM_EXT 0x3B
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| 218 | #define ATA_CMD_WRITE_STREAM_DMA_EXT 0x3A
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| 219 | #define ATA_CMD_WRITE_FUA_EXT 0x3D
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| 220 | #define ATA_CMD_WRITE_QUEUED_FUA_EXT 0x3E
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| 221 | #define ATA_CMD_FPDMA_READ 0x60
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| 222 | #define ATA_CMD_FPDMA_WRITE 0x61
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| 223 | #define ATA_CMD_PIO_READ 0x20
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| 224 | #define ATA_CMD_PIO_READ_EXT 0x24
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| 225 | #define ATA_CMD_PIO_WRITE 0x30
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| 226 | #define ATA_CMD_PIO_WRITE_EXT 0x34
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| 227 | #define ATA_CMD_READ_MULTI 0xC4
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| 228 | #define ATA_CMD_READ_MULTI_EXT 0x29
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| 229 | #define ATA_CMD_WRITE_MULTI 0xC5
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| 230 | #define ATA_CMD_WRITE_MULTI_EXT 0x39
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| 231 | #define ATA_CMD_WRITE_MULTI_FUA_EXT 0xCE
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| 232 | #define ATA_CMD_SET_FEATURES 0xEF
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| 233 | #define ATA_CMD_SET_MULTI 0xC6
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| 234 | #define ATA_CMD_PACKET 0xA0
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| 235 | #define ATA_CMD_VERIFY 0x40
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| 236 | #define ATA_CMD_VERIFY_EXT 0x42
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| 237 | #define ATA_CMD_WRITE_UNCORR_EXT 0x45
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| 238 | #define ATA_CMD_STANDBYNOW1 0xE0
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| 239 | #define ATA_CMD_IDLEIMMEDIATE 0xE1
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| 240 | #define ATA_CMD_SLEEP 0xE6
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| 241 | #define ATA_CMD_INIT_DEV_PARAMS 0x91
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| 242 | #define ATA_CMD_READ_NATIVE_MAX 0xF8
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| 243 | #define ATA_CMD_READ_NATIVE_MAX_EXT 0x27
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| 244 | #define ATA_CMD_SET_MAX 0xF9
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| 245 | #define ATA_CMD_SET_MAX_EXT 0x37
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| 246 | #define ATA_CMD_READ_LOG_EXT 0x2F
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| 247 | #define ATA_CMD_WRITE_LOG_EXT 0x3F
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| 248 | #define ATA_CMD_READ_LOG_DMA_EXT 0x47
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| 249 | #define ATA_CMD_WRITE_LOG_DMA_EXT 0x57
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| 250 | #define ATA_CMD_TRUSTED_RCV 0x5C
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| 251 | #define ATA_CMD_TRUSTED_RCV_DMA 0x5D
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| 252 | #define ATA_CMD_TRUSTED_SND 0x5E
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| 253 | #define ATA_CMD_TRUSTED_SND_DMA 0x5F
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| 254 | #define ATA_CMD_PMP_READ 0xE4
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| 255 | #define ATA_CMD_PMP_WRITE 0xE8
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| 256 | #define ATA_CMD_CONF_OVERLAY 0xB1
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| 257 | #define ATA_CMD_SEC_SET_PASS 0xF1
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| 258 | #define ATA_CMD_SEC_UNLOCK 0xF2
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| 259 | #define ATA_CMD_SEC_ERASE_PREP 0xF3
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| 260 | #define ATA_CMD_SEC_ERASE_UNIT 0xF4
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| 261 | #define ATA_CMD_SEC_FREEZE_LOCK 0xF5
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| 262 | #define ATA_CMD_SEC_DISABLE_PASS 0xF6
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| 263 | #define ATA_CMD_CONFIG_STREAM 0x51
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| 264 | #define ATA_CMD_SMART 0xB0
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| 265 | #define ATA_CMD_MEDIA_LOCK 0xDE
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| 266 | #define ATA_CMD_MEDIA_UNLOCK 0xDF
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| 267 | #define ATA_CMD_DSM 0x06
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| 268 | #define ATA_CMD_CHK_MED_CRD_TYP 0xD1
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| 269 | #define ATA_CMD_CFA_REQ_EXT_ERR 0x03
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| 270 | #define ATA_CMD_CFA_WRITE_NE 0x38
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| 271 | #define ATA_CMD_CFA_TRANS_SECT 0x87
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| 272 | #define ATA_CMD_CFA_ERASE 0xC0
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| 273 | #define ATA_CMD_CFA_WRITE_MULT_NE 0xCD
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| 274 | /* marked obsolete in the ATA/ATAPI-7 spec */
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| 275 | #define ATA_CMD_RESTORE 0x10
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| 276 |
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| 277 | /* READ_LOG_EXT pages */
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| 278 | #define ATA_LOG_SATA_NCQ 0x10
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| 279 |
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| 280 | /* READ/WRITE LONG (obsolete) */
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| 281 | #define ATA_CMD_READ_LONG 0x22
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| 282 | #define ATA_CMD_READ_LONG_ONCE 0x23
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| 283 | #define ATA_CMD_WRITE_LONG 0x32
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| 284 | #define ATA_CMD_WRITE_LONG_ONCE 0x33
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| 285 |
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| 286 | /* SETFEATURES stuff */
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| 287 | #define SETFEATURES_XFER 0x03
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| 288 | #define XFER_UDMA_7 0x47
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| 289 | #define XFER_UDMA_6 0x46
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| 290 | #define XFER_UDMA_5 0x45
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| 291 | #define XFER_UDMA_4 0x44
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| 292 | #define XFER_UDMA_3 0x43
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| 293 | #define XFER_UDMA_2 0x42
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| 294 | #define XFER_UDMA_1 0x41
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| 295 | #define XFER_UDMA_0 0x40
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| 296 | #define XFER_MW_DMA_4 0x24 /* CFA only */
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| 297 | #define XFER_MW_DMA_3 0x23 /* CFA only */
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| 298 | #define XFER_MW_DMA_2 0x22
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| 299 | #define XFER_MW_DMA_1 0x21
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| 300 | #define XFER_MW_DMA_0 0x20
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| 301 | #define XFER_SW_DMA_2 0x12
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| 302 | #define XFER_SW_DMA_1 0x11
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| 303 | #define XFER_SW_DMA_0 0x10
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| 304 | #define XFER_PIO_6 0x0E /* CFA only */
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| 305 | #define XFER_PIO_5 0x0D /* CFA only */
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| 306 | #define XFER_PIO_4 0x0C
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| 307 | #define XFER_PIO_3 0x0B
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| 308 | #define XFER_PIO_2 0x0A
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| 309 | #define XFER_PIO_1 0x09
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| 310 | #define XFER_PIO_0 0x08
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| 311 | #define XFER_PIO_SLOW 0x00
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| 312 |
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| 313 | #define SETFEATURES_WC_ON 0x02 /* Enable write cache */
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| 314 | #define SETFEATURES_WC_OFF 0x82 /* Disable write cache */
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| 315 |
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| 316 | /* Enable/Disable Automatic Acoustic Management */
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| 317 | #define SETFEATURES_AAM_ON 0x42
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| 318 | #define SETFEATURES_AAM_OFF 0xC2
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| 319 |
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| 320 | #define SETFEATURES_SPINUP 0x07 /* Spin-up drive */
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| 321 |
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| 322 | #define SETFEATURES_SATA_ENABLE 0x10 /* Enable use of SATA feature */
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| 323 | #define SETFEATURES_SATA_DISABLE 0x90 /* Disable use of SATA feature */
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| 324 |
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| 325 | /* SETFEATURE Sector counts for SATA features */
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| 326 | #define SATA_FPDMA_OFFSET 0x01 /* FPDMA non-zero buffer offsets */
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| 327 | #define SATA_FPDMA_AA 0x02 /* FPDMA Setup FIS Auto-Activate */
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| 328 | #define SATA_DIPM 0x03 /* Device Initiated Power Management */
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| 329 | #define SATA_FPDMA_IN_ORDER 0x04 /* FPDMA in-order data delivery */
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| 330 | #define SATA_AN 0x05 /* Asynchronous Notification */
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| 331 | #define SATA_SSP 0x06 /* Software Settings Preservation */
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| 332 |
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| 333 | /* feature values for SET_MAX */
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| 334 | #define ATA_SET_MAX_ADDR 0x00
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| 335 | #define ATA_SET_MAX_PASSWD 0x01
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| 336 | #define ATA_SET_MAX_LOCK 0x02
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| 337 | #define ATA_SET_MAX_UNLOCK 0x03
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| 338 | #define ATA_SET_MAX_FREEZE_LOCK 0x04
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| 339 |
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| 340 | /* feature values for DEVICE CONFIGURATION OVERLAY */
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| 341 | #define ATA_DCO_RESTORE 0xC0
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| 342 | #define ATA_DCO_FREEZE_LOCK 0xC1
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| 343 | #define ATA_DCO_IDENTIFY 0xC2
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| 344 | #define ATA_DCO_SET 0xC3
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| 345 |
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| 346 | /* feature values for SMART */
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| 347 | #define ATA_SMART_READ_VALUES 0xD0
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| 348 | #define ATA_SMART_READ_THRESHOLDS 0xD1
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| 349 | #define ATA_SMART_AUTOSAVE 0xD2
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| 350 | #define ATA_SMART_SAVE 0xD3
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| 351 | #define ATA_SMART_IMMEDIATE_OFFLINE 0xD4
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| 352 | #define ATA_SMART_READ_LOG 0xD5
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| 353 | #define ATA_SMART_WRITE_LOG 0xD6
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| 354 | #define ATA_SMART_ENABLE 0xD8
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| 355 | #define ATA_SMART_DISABLE 0xD9
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| 356 | #define ATA_SMART_STATUS 0xDA
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| 357 | #define ATA_SMART_AUTO_OFFLINE 0xDB
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| 358 |
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| 359 | /* feature values for Data Set Management */
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| 360 | #define ATA_DSM_TRIM 0x01
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| 361 |
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| 362 | /* password used in LBA Mid / LBA High for executing SMART commands */
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| 363 | #define ATA_SMART_LBAM_PASS 0x4F
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| 364 | #define ATA_SMART_LBAH_PASS 0xC2
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| 365 |
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| 366 | /* ATAPI stuff */
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| 367 | #define ATAPI_PKT_DMA (1U << 0)
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| 368 | #define ATAPI_DMADIR (1U << 2) /* ATAPI data dir:
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| 369 | 0=to device, 1=to host */
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| 370 | #define ATAPI_CDB_LEN 16
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| 371 |
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| 372 | /* PMP stuff */
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| 373 | #define SATA_PMP_MAX_PORTS 15
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| 374 | #define SATA_PMP_CTRL_PORT 15
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| 375 |
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| 376 | #define SATA_PMP_GSCR_DWORDS 128
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| 377 | #define SATA_PMP_GSCR_PROD_ID 0
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| 378 | #define SATA_PMP_GSCR_REV 1
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| 379 | #define SATA_PMP_GSCR_PORT_INFO 2
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| 380 | #define SATA_PMP_GSCR_ERROR 32
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| 381 | #define SATA_PMP_GSCR_ERROR_EN 33
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| 382 | #define SATA_PMP_GSCR_FEAT 64
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| 383 | #define SATA_PMP_GSCR_FEAT_EN 96
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| 384 |
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| 385 | #define SATA_PMP_PSCR_STATUS 0
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| 386 | #define SATA_PMP_PSCR_ERROR 1
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| 387 | #define SATA_PMP_PSCR_CONTROL 2
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| 388 |
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| 389 | #define SATA_PMP_FEAT_BIST (1U << 0)
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| 390 | #define SATA_PMP_FEAT_PMREQ (1U << 1)
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| 391 | #define SATA_PMP_FEAT_DYNSSC (1U << 2)
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| 392 | #define SATA_PMP_FEAT_NOTIFY (1U << 3)
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| 393 |
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| 394 | /* SATA Status and Control Registers */
|
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| 395 | #define SCR_STATUS 0
|
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| 396 | #define SCR_ERROR 1
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| 397 | #define SCR_CONTROL 2
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| 398 | #define SCR_ACTIVE 3
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| 399 | #define SCR_NOTIFICATION 4
|
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| 400 |
|
|---|
| 401 | /* SError bits */
|
|---|
| 402 | #define SERR_DATA_RECOVERED (1UL << 0) /* recovered data error */
|
|---|
| 403 | #define SERR_COMM_RECOVERED (1UL << 1) /* recovered comm failure */
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|---|
| 404 | #define SERR_DATA (1UL << 8) /* unrecovered data error */
|
|---|
| 405 | #define SERR_PERSISTENT (1UL << 9) /* persistent data/comm error */
|
|---|
| 406 | #define SERR_PROTOCOL (1UL << 10) /* protocol violation */
|
|---|
| 407 | #define SERR_INTERNAL (1UL << 11) /* host internal error */
|
|---|
| 408 | #define SERR_PHYRDY_CHG (1UL << 16) /* PHY RDY changed */
|
|---|
| 409 | #define SERR_PHY_INT_ERR (1UL << 17) /* PHY internal error */
|
|---|
| 410 | #define SERR_COMM_WAKE (1UL << 18) /* Comm wake */
|
|---|
| 411 | #define SERR_10B_8B_ERR (1UL << 19) /* 10b to 8b decode error */
|
|---|
| 412 | #define SERR_DISPARITY (1UL << 20) /* Disparity */
|
|---|
| 413 | #define SERR_CRC (1UL << 21) /* CRC error */
|
|---|
| 414 | #define SERR_HANDSHAKE (1UL << 22) /* Handshake error */
|
|---|
| 415 | #define SERR_LINK_SEQ_ERR (1UL << 23) /* Link sequence error */
|
|---|
| 416 | #define SERR_TRANS_ST_ERROR (1UL << 24) /* Transport state trans. error */
|
|---|
| 417 | #define SERR_UNRECOG_FIS (1UL << 25) /* Unrecognized FIS */
|
|---|
| 418 | #define SERR_DEV_XCHG (1UL << 26) /* device exchanged */
|
|---|
| 419 |
|
|---|
| 420 | /******************************************************************************
|
|---|
| 421 | * Parameters for ATA commands. Those parameters are passed in a variable
|
|---|
| 422 | * argument list in the format:
|
|---|
| 423 | *
|
|---|
| 424 | * AP_xxx, [val, ...], AP_xxx, [val, ...]
|
|---|
| 425 | *
|
|---|
| 426 | * The values expected by each parameter are indicated within square brackets.
|
|---|
| 427 | */
|
|---|
| 428 | typedef enum {
|
|---|
| 429 | AP_FEATURES, /* [u16] ATA command features (read: flags) */
|
|---|
| 430 | AP_COUNT, /* [u16] number of sectors (0 = 65536) */
|
|---|
| 431 | AP_SECTOR_28, /* [u32] 28-bit sector address */
|
|---|
| 432 | AP_SECTOR_48, /* [u32, u16] 48-bit sector address */
|
|---|
| 433 | AP_DEVICE, /* [u16] ATA cmd "device" field */
|
|---|
| 434 | AP_SGLIST, /* [void *, u16] buffer S/G (SCATGATENTRY/count) */
|
|---|
| 435 | AP_VADDR, /* [void *, u16] buffer virtual address (buf/len) */
|
|---|
| 436 | AP_WRITE, /* [u16] if != 0, data is written to device */
|
|---|
| 437 | AP_AHCI_FLAGS, /* [u16] AHCI command header flags */
|
|---|
| 438 | AP_ATAPI_CMD, /* [void *, u16] ATAPI command (CDB) and length */
|
|---|
| 439 | AP_ATA_CMD, /* [void *] ATA command (fixed len) */
|
|---|
| 440 | AP_END /* [] end of variable argument list */
|
|---|
| 441 | } ATA_PARM;
|
|---|
| 442 |
|
|---|
| 443 | /******************************************************************************
|
|---|
| 444 | * Return codes for ata_cmd(); please note that positive return codes indicate
|
|---|
| 445 | * that not all S/G elements could be mapped, 0 means success and negative
|
|---|
| 446 | * values indicate error conditions.
|
|---|
| 447 | */
|
|---|
| 448 | #define ATA_CMD_SUCCESS 0
|
|---|
| 449 | #define ATA_CMD_INVALID_PARM -1
|
|---|
| 450 | #define ATA_CMD_UNALIGNED_ADDR -2
|
|---|
| 451 |
|
|---|
| 452 | /* ------------------------ typedefs and structures ------------------------ */
|
|---|
| 453 |
|
|---|
| 454 | /******************************************************************************
|
|---|
| 455 | * Generic ATA-8 command structure. This is loosely based on ATA-8, i.e. we
|
|---|
| 456 | * don't have to deal with shadow registers and map them to the low bytes of
|
|---|
| 457 | * adjecent words, etc. but there are still some oddities which need to be
|
|---|
| 458 | * taken into consideration. For example, ATA-8 says LBA-28 sector addresses
|
|---|
| 459 | * are simply the lower 28 bits in the LBA field. However, the underlying
|
|---|
| 460 | * transport (SATA in our case) only looks at the three lower bytes of the
|
|---|
| 461 | * LBA field, much like an IDE device would do. This means that only 3 bytes
|
|---|
| 462 | * of the LBA field are processed and this yields only 24 bits. The remaining
|
|---|
| 463 | * 4 bits need to be stored in the "device" register....
|
|---|
| 464 | *
|
|---|
| 465 | * Everything else seems to behave normally, as far as this term can be
|
|---|
| 466 | * applied to IDE/ATA. Further details can be found in section 7.1.5.1 of the
|
|---|
| 467 | * ATA-8 spec (Inputs for 28-bit Read/Write Commands).
|
|---|
| 468 | */
|
|---|
| 469 | typedef struct {
|
|---|
| 470 | u16 features; /* feature bits */
|
|---|
| 471 | u16 count; /* count register (e.g. number of sectors) */
|
|---|
| 472 | u32 lba_l; /* low 24 bits of LBA-28 (32 bits for 48-bit devices) */
|
|---|
| 473 | u16 lba_h; /* high 16 bits of LBA for 48-bit devices */
|
|---|
| 474 | u8 cmd; /* ATA command field */
|
|---|
| 475 | u8 device; /* ATA device field and upper 4 bits of LBA-28 */
|
|---|
| 476 | } ATA_CMD;
|
|---|
| 477 |
|
|---|
| 478 | /* generic ATA-8 response structure */
|
|---|
| 479 | typedef struct {
|
|---|
| 480 | u16 error; /* error code, if any */
|
|---|
| 481 | u16 count; /* count register (e.g. number of sectors) */
|
|---|
| 482 | u32 lba_l; /* low 28 bits of LBA (32 bits for 48-bit devices) */
|
|---|
| 483 | u16 lba_h; /* high 16 bits of LBA for 48-bit devices */
|
|---|
| 484 | u16 status; /* response status bits */
|
|---|
| 485 | } ATA_RSP;
|
|---|
| 486 |
|
|---|
| 487 | /******************************************************************************
|
|---|
| 488 | * Command-specific ATA-8 structures.
|
|---|
| 489 | */
|
|---|
| 490 |
|
|---|
| 491 | /* -------------------------- function prototypes -------------------------- */
|
|---|
| 492 |
|
|---|
| 493 | extern int ata_cmd(AD_INFO *ai, int port, int device, int slot, int cmd, ...);
|
|---|
| 494 | extern int v_ata_cmd(AD_INFO *ai, int port, int device, int slot, int cmd, va_list va);
|
|---|
| 495 | extern void ata_cmd_to_fis(u8 *fis, ATA_CMD *cmd, int device);
|
|---|
| 496 | extern USHORT ata_get_sg_indx(IORB_EXECUTEIO *io);
|
|---|
| 497 | extern void ata_max_sg_cnt(IORB_EXECUTEIO *io, USHORT sg_indx, USHORT sg_max, USHORT *sg_cnt, USHORT *sector_cnt);
|
|---|
| 498 |
|
|---|
| 499 | extern int ata_get_geometry(IORBH FAR16DATA *iorb, IORBH *pIorb, int slot);
|
|---|
| 500 | extern void ata_get_geometry_pp(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 501 | extern int ata_unit_ready(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot);
|
|---|
| 502 | extern int ata_read(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot);
|
|---|
| 503 | extern int ata_read_unaligned(IORBH *pIorb, int slot);
|
|---|
| 504 | extern void ata_read_pp(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 505 | extern int ata_verify(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot);
|
|---|
| 506 | extern int ata_write(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot);
|
|---|
| 507 | extern int ata_write_unaligned(IORBH *pIorb, int slot);
|
|---|
| 508 | extern void ata_write_pp(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 509 | extern int ata_execute_ata(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot);
|
|---|
| 510 | extern void ata_execute_ata_pp(IORBH FAR16DATA *vIorb, IORBH *pIorb);
|
|---|
| 511 | extern int ata_req_sense(IORBH FAR16DATA *vIorb, IORBH *pIorb, int slot);
|
|---|
| 512 |
|
|---|
| 513 | extern char *ata_dev_name(u16 *id_buf);
|
|---|
| 514 |
|
|---|
