source: trunk/src/os2ahci/ahci.c@ 74

Last change on this file since 74 was 74, checked in by chris, 15 years ago
  • ATAPI fixes; still having trouble with INQUIRY command bein sent with incorrect direction
  • fixes to port reset and restart handling
  • improved ATA IDENTIFY handling based on ATA reset signature
File size: 54.0 KB
Line 
1/******************************************************************************
2 * ahci.c - ahci hardware access functions
3 *
4 * Copyright (c) 2010 Christian Mueller. Parts copied from/inspired by the
5 * Linux AHCI driver; those parts are (c) Linux AHCI/ATA maintainers
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include "os2ahci.h"
23#include "ata.h"
24#include "atapi.h"
25
26/* -------------------------- macros and constants ------------------------- */
27
28/* produce ata/atapi function pointer with the given func name */
29#define cmd_func(iorb, func) ad_infos[iorb_unit_adapter(iorb)]. \
30 ports[iorb_unit_port(iorb)]. \
31 devs[iorb_unit_device(iorb)].atapi \
32 ? atapi_##func : ata_##func
33
34
35/* ------------------------ typedefs and structures ------------------------ */
36
37/* -------------------------- function prototypes -------------------------- */
38
39static void ahci_setup_device (AD_INFO *ai, int p, int d, u16 *id_buf);
40
41/* ------------------------ global/static variables ------------------------ */
42
43/* Initial driver status flags indexed by the board_* constants in os2ahci.h
44 *
45 * NOTE: The Linux AHCI driver uses a combination of board-specific quirk
46 * flags and overriding certain libata service functions to handle
47 * adapter flaws. However, there were only three overrides at the time
48 * os2ahci was written, one for hard adapter resets and two for port
49 * resets, and we can easily implement those within the corresponding
50 * reset handlers. If this becomes more complex, this array of flags
51 * should be converted into a structure array which contains function
52 * pointers to all handler functions which may need to be overridden.
53 */
54u16 initial_flags[] = {
55 0, /* board_ahci */
56 AHCI_HFLAG_NO_NCQ | /* board_ahci_vt8251 */
57 AHCI_HFLAG_NO_PMP,
58 AHCI_HFLAG_IGN_IRQ_IF_ERR, /* board_ahci_ign_iferr */
59 AHCI_HFLAG_IGN_SERR_INTERNAL | /* board_ahci_sb600 */
60 AHCI_HFLAG_NO_MSI |
61 AHCI_HFLAG_SECT255 |
62 AHCI_HFLAG_32BIT_ONLY,
63 AHCI_HFLAG_NO_NCQ | /* board_ahci_mv */
64 AHCI_HFLAG_NO_MSI |
65 AHCI_HFLAG_MV_PATA |
66 AHCI_HFLAG_NO_PMP,
67 AHCI_HFLAG_IGN_SERR_INTERNAL, /* board_ahci_sb700 */
68 AHCI_HFLAG_YES_NCQ, /* board_ahci_mcp65 */
69 AHCI_HFLAG_NO_PMP, /* board_ahci_nopmp */
70 AHCI_HFLAG_YES_NCQ, /* board_ahci_yesncq */
71 AHCI_HFLAG_NO_SNTF, /* board_ahci_nosntf */
72};
73
74/* IRQ levels for stub interrupt handlers. OS/2 calls interrupt handlers
75 * without passing the IRQ level, yet it expects the interrupt handler to
76 * know the IRQ level for EOI processing. Thus we need multiple interrupt
77 * handlers, one for each IRQ, and some mapping from the interrupt handler
78 * index to the corresponding IRQ.
79 */
80static u16 irq_map[MAX_AD]; /* IRQ level for each stub IRQ func */
81static int irq_map_cnt; /* number of IRQ stub funcs used */
82
83/* ----------------------------- start of code ----------------------------- */
84
85/******************************************************************************
86 * Interrupt handlers. Those are stubs which call the real interrupt handler
87 * with the IRQ level as parameter. This mapping is required because OS/2
88 * calls interrupt handlers without any parameters, yet expects them to know
89 * which IRQ level to complete when calling DevHelp_EOI().
90 *
91 * This array of functions needs to be extended when increasing MAX_AD.
92 */
93#if MAX_AD > 8
94#error must extend irq_handler_xx and irq_handlers[] when increasing MAX_AD
95#endif
96
97/* Macro to call AHCI interrupt handler and set/clear carry flag accordingly.
98 * We need to set the carry flag if the interrupt was not handled. This is
99 * done by shifting the return value of ahci_intr() to the right, implying
100 * bit 0 will be set when the interrupt was not handled.
101 */
102#define call_ahci_intr(i) return(ahci_intr(irq_map[i]) >> 1)
103
104static USHORT _cdecl _far irq_handler_00(void) { call_ahci_intr(0); }
105static USHORT _cdecl _far irq_handler_01(void) { call_ahci_intr(1); }
106static USHORT _cdecl _far irq_handler_02(void) { call_ahci_intr(2); }
107static USHORT _cdecl _far irq_handler_03(void) { call_ahci_intr(3); }
108static USHORT _cdecl _far irq_handler_04(void) { call_ahci_intr(4); }
109static USHORT _cdecl _far irq_handler_05(void) { call_ahci_intr(5); }
110static USHORT _cdecl _far irq_handler_06(void) { call_ahci_intr(6); }
111static USHORT _cdecl _far irq_handler_07(void) { call_ahci_intr(7); }
112
113PFN irq_handlers[] = {
114 (PFN) irq_handler_00, (PFN) irq_handler_01, (PFN) irq_handler_02,
115 (PFN) irq_handler_03, (PFN) irq_handler_04, (PFN) irq_handler_05,
116 (PFN) irq_handler_06, (PFN) irq_handler_07
117};
118
119/******************************************************************************
120 * Save BIOS configuration of AHCI adapter. As a side effect, this also saves
121 * generic configuration information which we may have to restore after an
122 * adapter reset.
123 *
124 * NOTE: This function also saves working copies of the CAP and CAP2 registers
125 * as well as the initial port map in the AD_INFO structure after
126 * removing features which are known to cause trouble on this specific
127 * piece of hardware.
128 */
129int ahci_save_bios_config(AD_INFO *ai)
130{
131 int ports;
132 int i;
133
134 /* save BIOS configuration */
135 for (i = 0; i < HOST_CAP2; i += sizeof(u32)) {
136 ai->bios_config[i / sizeof(u32)] = readl(ai->mmio + i);
137 }
138
139 /* HOST_CAP2 only exists for AHCI V1.2 and later */
140 if (ai->bios_config[HOST_VERSION / sizeof(u32)] >= 0x00010200L) {
141 ai->bios_config[HOST_CAP2 / sizeof(u32)] = readl(ai->mmio + HOST_CAP2);
142 } else {
143 ai->bios_config[HOST_CAP2 / sizeof(u32)] = 0;
144 }
145
146 /* print AHCI register debug information */
147 if (debug) {
148 printf("AHCI global controller registers:\n");
149 for (i = 0; i <= HOST_CAP2 / sizeof(u32); i++) {
150 u32 val = ai->bios_config[i];
151 printf(" %02x: %08lx", i, val);
152
153 if (i == HOST_CAP) {
154 printf(" -");
155 if (val & HOST_CAP_64) printf(" 64bit");
156 if (val & HOST_CAP_NCQ) printf(" ncq");
157 if (val & HOST_CAP_SNTF) printf(" sntf");
158 if (val & HOST_CAP_MPS) printf(" mps");
159 if (val & HOST_CAP_SSS) printf(" sss");
160 if (val & HOST_CAP_ALPM) printf(" alpm");
161 if (val & HOST_CAP_LED) printf(" led");
162 if (val & HOST_CAP_CLO) printf(" clo");
163 if (val & HOST_CAP_ONLY) printf(" ahci_only");
164 if (val & HOST_CAP_PMP) printf(" pmp");
165 if (val & HOST_CAP_FBS) printf(" fbs");
166 if (val & HOST_CAP_PIO_MULTI) printf(" pio_multi");
167 if (val & HOST_CAP_SSC) printf(" ssc");
168 if (val & HOST_CAP_PART) printf(" part");
169 if (val & HOST_CAP_CCC) printf(" ccc");
170 if (val & HOST_CAP_EMS) printf(" ems");
171 if (val & HOST_CAP_SXS) printf(" sxs");
172 printf(" cmd_slots:%d", (u16) ((val >> 8) & 0x1f) + 1);
173 printf(" ports:%d", (u16) (val & 0x1f) + 1);
174
175 } else if (i == HOST_CTL) {
176 printf(" -");
177 if (val & HOST_AHCI_EN) printf(" ahci_enabled");
178 if (val & HOST_IRQ_EN) printf(" irq_enabled");
179 if (val & HOST_RESET) printf(" resetting");
180
181 } else if (i == HOST_CAP2) {
182 printf(" -");
183 if (val & HOST_CAP2_BOH) printf(" boh");
184 if (val & HOST_CAP2_NVMHCI) printf(" nvmhci");
185 if (val & HOST_CAP2_APST) printf(" apst");
186
187 }
188 printf("\n");
189 }
190 }
191
192 /* Save working copies of CAP, CAP2 and port_map and remove broken feature
193 * bits. This is largely copied from the Linux AHCI driver -- the wisdom
194 * around quirks and faulty hardware is hard to come by...
195 */
196 ai->cap = ai->bios_config[HOST_CAP / sizeof(u32)];
197 ai->cap2 = ai->bios_config[HOST_CAP2 / sizeof(u32)];
198 ai->port_map = ai->bios_config[HOST_PORTS_IMPL / sizeof(u32)];
199
200 if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags)) {
201 dprintf("error: invalid board index in PCI info\n");
202 return(-1);
203 }
204 ai->flags = initial_flags[ai->pci->board];
205
206 if ((ai->cap & HOST_CAP_64) && (ai->flags & AHCI_HFLAG_32BIT_ONLY)) {
207 /* disable 64-bit support for faulty controllers; OS/2 can't do 64 bits at
208 * this point, of course, but who knows where all this will be in a few
209 * years...
210 */
211 ai->cap &= ~HOST_CAP_64;
212 }
213
214 if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ)) {
215 dprintf("controller can't do NCQ, turning off CAP_NCQ\n");
216 ai->cap &= ~HOST_CAP_NCQ;
217 }
218
219 if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ)) {
220 dprintf("controller can do NCQ, turning on CAP_NCQ\n");
221 ai->cap |= HOST_CAP_NCQ;
222 }
223
224 if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP)) {
225 dprintf("controller can't do PMP, turning off CAP_PMP\n");
226 ai->cap |= HOST_CAP_PMP;
227 }
228
229 if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF)) {
230 dprintf("controller can't do SNTF, turning off CAP_SNTF\n");
231 ai->cap &= ~HOST_CAP_SNTF;
232 }
233
234 if (ai->pci->vendor == PCI_VENDOR_ID_JMICRON &&
235 ai->pci->device == 0x2361 && ai->port_map != 1) {
236 dprintf("JMB361 has only one port, port_map 0x%lx -> 0x%lx\n", ai->port_map, 1);
237 ai->port_map = 1;
238 }
239
240 /* Correlate port map to number of ports reported in HOST_CAP
241 *
242 * NOTE: Port map and number of ports handling differs a bit from the
243 * Linux AHCI driver because we're storing both in AI_INFO. As in the
244 * Linux driver, the port map is the main driver for port scanning but
245 * we're also saving a maximum port number in AI_INFO to reduce the
246 * number of IORB queues to look at in trigger_engine(). This is done
247 * in ahci_scan_ports().
248 */
249 ports = (ai->cap & 0x1f) + 1;
250 for (i = 0; i < AHCI_MAX_PORTS; i++) {
251 if (ai->port_map & (1UL << i)) {
252 ports--;
253 }
254 }
255 if (ports < 0) {
256 /* more ports in port_map than in HOST_CAP & 0x1f */
257 ports = (ai->cap & 0x1f) + 1;
258 dprintf("implemented port map (0x%lx) contains more "
259 "ports than nr_ports (%d), using nr_ports\n",
260 ai->port_map, ports);
261 ai->port_map = (1UL << ports) - 1UL;
262 }
263
264 /* set maximum command slot number */
265 ai->cmd_max = (u16) ((ai->cap >> 8) & 0x1f);
266
267 return(0);
268}
269
270/******************************************************************************
271 * Restore BIOS configuration of AHCI adapter. This is needed after scanning
272 * for devices because we still need the BIOS until the initial boot sequence
273 * has completed.
274 */
275int ahci_restore_bios_config(AD_INFO *ai)
276{
277 ddprintf("restoring AHCI BIOS configuration\n");
278
279 /* restore saved BIOS configuration */
280 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
281 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
282 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
283 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
284
285 /* flush PCI MMIO delayed write buffers */
286 readl(ai->mmio + HOST_EM_CTL);
287
288 return(0);
289}
290
291/******************************************************************************
292 * Restore initial configuration (e.g. after an adapter reset). This relies
293 * on information saved by 'ahci_save_bios_config()'.
294 */
295int ahci_restore_initial_config(AD_INFO *ai)
296{
297 ddprintf("restoring initial configuration\n");
298
299 /* restore saved BIOS configuration */
300 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
301 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
302 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
303 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
304
305 /* flush PCI MMIO delayed write buffers */
306 readl(ai->mmio + HOST_EM_CTL);
307
308 /* (re-)enable AHCI mode */
309 ahci_enable_ahci(ai);
310
311 return(0);
312}
313
314/******************************************************************************
315 * Save port configuration. This is primarily used to save the BIOS port
316 * configuration (command list and FIS buffers and the IRQ mask).
317 *
318 * The port configuration returned by this function is dynamically allocated
319 * and automatically freed when calling ahci_restore_port_config().
320 */
321AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p)
322{
323 AHCI_PORT_CFG *pc;
324 u8 _far *port_mmio = port_base(ai, p);
325
326 if ((pc = malloc(sizeof(*pc))) == NULL) {
327 return(NULL);
328 }
329
330 pc->cmd_list = readl(port_mmio + PORT_LST_ADDR);
331 pc->cmd_list_h = readl(port_mmio + PORT_LST_ADDR_HI);
332 pc->fis_rx = readl(port_mmio + PORT_FIS_ADDR);
333 pc->fis_rx_h = readl(port_mmio + PORT_FIS_ADDR_HI);
334 pc->irq_mask = readl(port_mmio + PORT_IRQ_MASK);
335
336 return(pc);
337}
338
339/******************************************************************************
340 * Restore port configuration. This is primarily used to restore the BIOS port
341 * configuration (command list and FIS buffers and the IRQ mask).
342 *
343 * The port configuration automatically freed.
344 */
345void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc)
346{
347 u8 _far *port_mmio = port_base(ai, p);
348
349 writel(port_mmio + PORT_LST_ADDR, pc->cmd_list);
350 writel(port_mmio + PORT_LST_ADDR_HI, pc->cmd_list_h);
351 writel(port_mmio + PORT_FIS_ADDR, pc->fis_rx);
352 writel(port_mmio + PORT_FIS_ADDR_HI, pc->fis_rx_h);
353 writel(port_mmio + PORT_IRQ_MASK, pc->irq_mask);
354
355 readl(port_base(ai, p) + PORT_IRQ_MASK); /* flush */
356
357 free(pc);
358}
359
360/******************************************************************************
361 * Enable AHCI mode on this controller.
362 */
363int ahci_enable_ahci(AD_INFO *ai)
364{
365 u32 ctl = readl(ai->mmio + HOST_CTL);
366 int i;
367
368 if (ctl & HOST_AHCI_EN) {
369 /* AHCI mode already enabled */
370 return(0);
371 }
372
373 /* some controllers need AHCI_EN to be written multiple times */
374 for (i = 0; i < 5; i++) {
375 ctl |= HOST_AHCI_EN;
376 writel(ai->mmio + HOST_CTL, ctl);
377 ctl = readl(ai->mmio + HOST_CTL); /* flush && sanity check */
378 if (ctl & HOST_AHCI_EN) {
379 return(0);
380 }
381 mdelay(10);
382 }
383
384 /* couldn't enable AHCI mode */
385 dprintf("failed to enable AHCI mode on adapter #%d\n", ad_no(ai));
386 return(1);
387}
388
389/******************************************************************************
390 * Scan all ports for connected devices and fill in the corresponding device
391 * information.
392 *
393 * NOTES:
394 *
395 * - The adapter is temporarily configured for os2ahci but the original BIOS
396 * configuration will be restored when done. This happens only until we
397 * have received the IOCC_COMPLETE_INIT command.
398 *
399 * - Subsequent calls are currently not planned but may be required for
400 * suspend/resume handling, hot swap functionality, etc.
401 *
402 * - This function is expected to be called with the spinlock released but
403 * the corresponding adapter's busy flag set. It will aquire the spinlock
404 * temporarily to allocate/free memory for the ATA identify buffer.
405 */
406int ahci_scan_ports(AD_INFO *ai)
407{
408 AHCI_PORT_CFG *pc = NULL;
409 u16 *id_buf;
410 int is_ata;
411 int rc;
412 int p;
413 int i;
414
415 spin_lock(drv_lock);
416 id_buf = malloc(ATA_ID_WORDS * sizeof(u16));
417 spin_unlock(drv_lock);
418 if (id_buf == NULL) {
419 return(-1);
420 }
421
422 if (ai->bios_config[0] == 0) {
423 /* first call */
424 ahci_save_bios_config(ai);
425 }
426
427 if (ahci_enable_ahci(ai)) {
428 goto exit_port_scan;
429 }
430
431 /* perform port scan */
432 dprintf("scanning ports on adapter #%d\n", ad_no(ai));
433 for (p = 0; p < AHCI_MAX_PORTS; p++) {
434 if (ai->port_map & (1UL << p)) {
435
436 if (!init_complete) {
437 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
438 goto exit_port_scan;
439 }
440 }
441
442 /* start/reset port; if no device is attached, this is expected to fail */
443 if (init_reset) {
444 ddprintf("init-resetting port #%d\n", p);
445 rc = ahci_reset_port(ai, p, 0);
446 } else {
447 ddprintf("(re)starting port #%d\n", p);
448 ahci_stop_port(ai, p);
449 rc = ahci_start_port(ai, p, 0);
450 }
451 if (rc) {
452 /* no device attached to this port */
453 ai->port_map &= ~(1UL << p);
454 goto restore_port_config;
455 }
456
457 /* this port seems to have a device attached and ready for commands */
458 ddprintf("port #%d seems to be attached to a device; probing...\n", p);
459
460 /* Get ATA(PI) identity. The so-called signature gives us a hint whether
461 * this is an ATA or an ATAPI device but we'll try both in either case;
462 * the signature will merely determine whether we're going to probe for
463 * an ATA or ATAPI device, first, in order to reduce the chance of sending
464 * the wrong command (which would result in a port reset given the way
465 * ahci_exec_polled_cmd() was implemented).
466 */
467 is_ata = readl(port_base(ai, p) + PORT_SIG) == 0x00000101UL;
468 for (i = 0; i < 2; i++) {
469 rc = ahci_exec_polled_cmd(ai, p, 0, 500,
470 (is_ata) ? ATA_CMD_ID_ATA : ATA_CMD_ID_ATAPI,
471 AP_VADDR, (void _far *) id_buf, 512,
472 AP_END);
473 if (rc == 0) {
474 break;
475 }
476
477 /* try again with ATA/ATAPI swapped */
478 is_ata = !is_ata;
479 }
480
481 if (rc == 0) {
482 /* we have a valid IDENTIFY or IDENTIFY_PACKET response */
483 ddphex(id_buf, 512, "ATA_IDENTIFY%s results:\n", (is_ata) ? "" : "_PACKET");
484 ahci_setup_device(ai, p, 0, id_buf);
485 } else {
486 /* no device attached to this port */
487 ai->port_map &= ~(1UL << p);
488 }
489
490 restore_port_config:
491 if (pc != NULL) {
492 ahci_restore_port_config(ai, p, pc);
493 }
494 }
495 }
496
497exit_port_scan:
498 if (!init_complete) {
499 ahci_restore_bios_config(ai);
500 }
501 spin_lock(drv_lock);
502 free(id_buf);
503 spin_unlock(drv_lock);
504 return(0);
505}
506
507/******************************************************************************
508 * Complete initialization of adapter. This includes restarting all active
509 * ports and initializing interrupt processing. This is called when receiving
510 * the IOCM_COMPLETE_INIT request.
511 */
512int ahci_complete_init(AD_INFO *ai)
513{
514 int rc;
515 int p;
516 int i;
517
518 dprintf("completing initialization of adapter #%d\n", ad_no(ai));
519
520 /* register IRQ handlers; each IRQ level is registered only once */
521 for (i = 0; i < irq_map_cnt; i++) {
522 if (irq_map[i] == ai->irq) {
523 /* we already have this IRQ registered */
524 break;
525 }
526 }
527
528 if (i >= irq_map_cnt) {
529 dprintf("registering interrupt #%d\n", ai->irq);
530
531 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 1) != 0) {
532 dprintf("failed to register shared interrupt\n");
533
534 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 0) != 0) {
535 dprintf("failed to register exclusive interrupt\n");
536 return(-1);
537 }
538 }
539 irq_map[irq_map_cnt++] = ai->irq;
540 }
541
542 /* enable AHCI mode */
543 if ((rc = ahci_enable_ahci(ai)) != 0) {
544 return(rc);
545 }
546
547 /* Start all ports. The main purpose is to set the command list and FIS
548 * receive area addresses properly and to enable port-level interrupts; we
549 * don't really care about the return status because we'll find out soon
550 * enough if a previously detected device has problems.
551 */
552 for (p = 0; p < AHCI_MAX_PORTS; p++) {
553 if (ai->port_map & (1UL << p)) {
554 dprintf("restarting port #%d\n", p);
555 ahci_stop_port(ai, p);
556 ahci_start_port(ai, p, 1);
557 }
558 }
559
560 /* clear pending interrupt status */
561 writel(ai->mmio + HOST_IRQ_STAT, readl(ai->mmio + HOST_IRQ_STAT));
562 readl(ai->mmio + HOST_IRQ_STAT); /* flush */
563
564 /* enable adapter-level interrupts */
565 writel(ai->mmio + HOST_CTL, HOST_IRQ_EN);
566 readl(ai->mmio + HOST_CTL); /* flush */
567
568 /* enable interrupts on PCI-level (PCI 2.3 added a feature to disable ints) */
569 /* pci_enable_int(ai->bus, ai->dev_func); */
570
571 return(0);
572}
573
574/******************************************************************************
575 * Reset specified port. This function is typically called during adapter
576 * initialization and first gets the port into a defined status, then resets
577 * the port by sending a COMRESET signal.
578 *
579 * This function is also the location of the link speed initialization (link
580 * needs to be restablished after changing link speed, anyway).
581 *
582 * NOTE: This function uses a busy loop to wait for DMA engines to stop and
583 * the COMRESET to complete. It should only be called at task time
584 * during initialization or in a context hook.
585 */
586int ahci_reset_port(AD_INFO *ai, int p, int ei)
587{
588 u8 _far *port_mmio = port_base(ai, p);
589 u32 tmp;
590 int timeout = 5000;
591
592 dprintf("resetting port %d.%d\n", ad_no(ai), p);
593
594 /* stop port engines (we don't care whether there is an error doing so) */
595 ahci_stop_port(ai, p);
596
597 /* clear SError */
598 tmp = readl(port_mmio + PORT_SCR_ERR);
599 ddprintf(" PORT_SCR_ERR = 0x%lx\n", tmp);
600 writel(port_mmio + PORT_SCR_ERR, tmp);
601
602 /* clear pending port IRQs */
603 tmp = readl(port_mmio + PORT_IRQ_STAT);
604 ddprintf("PORT_IRQ_STAT was 0x%lx\n", tmp);
605 if (tmp) {
606 writel(port_mmio + PORT_IRQ_STAT, tmp);
607 }
608 ddprintf(" PORT_IRQ_STAT = 0x%lx\n", tmp);
609 ddprintf(" PORT_IRQ_MASK = 0x%lx\n", readl(port_mmio + PORT_IRQ_MASK));
610 ddprintf(" HOST_IRQ_STAT = 0x%lx\n", readl(ai->mmio + HOST_IRQ_STAT));
611 writel(ai->mmio + HOST_IRQ_STAT, 1UL << p);
612
613 /* set link speed */
614 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x000000f0UL;
615 writel(port_mmio + PORT_SCR_CTL, tmp | (link_speed[ad_no(ai)][p] << 4));
616
617 /* issue COMRESET on the port */
618 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x0000000fUL;
619 writel(port_mmio + PORT_SCR_CTL, tmp | 1);
620 readl(port_mmio + PORT_SCR_CTL); /* flush */
621
622 /* spec says "leave reset bit on for at least 1ms"; make it 2ms */
623 mdelay(2);
624
625 writel(port_mmio + PORT_SCR_CTL, tmp);
626 readl(port_mmio + PORT_SCR_CTL); /* flush */
627
628 /* wait for communication to be re-established after port reset */
629 while (((tmp = readl(port_mmio + PORT_SCR_STAT) & 3)) != 3) {
630 mdelay(10);
631 timeout -= 10;
632 if (timeout <= 0) {
633 dprintf("no device present after resetting port #%d "
634 "(PORT_SCR_STAT = 0x%lx)\n", p, tmp);
635 return(-1);
636 }
637 }
638
639 /* clear SError again (recommended by AHCI spec) */
640 tmp = readl(port_mmio + PORT_SCR_ERR);
641 writel(port_mmio + PORT_SCR_ERR, tmp);
642
643 /* start port so we can receive the COMRESET FIS */
644 ahci_start_port(ai, p, ei);
645
646 /* wait for device to be ready ((PxTFD & (BSY | DRQ | ERR)) == 0) */
647 while (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
648 mdelay(10);
649 timeout -= 10;
650 if (timeout <= 0) {
651 dprintf("device not ready on port #%d "
652 "(PORT_TFDATA = 0x%lx)\n", p, tmp);
653 ahci_stop_port(ai, p);
654 return(-1);
655 }
656 }
657 ddprintf(" PORT_TFDATA = 0x%lx\n", readl(port_mmio + PORT_TFDATA));
658
659 return(0);
660}
661
662/******************************************************************************
663 * Start specified port.
664 */
665int ahci_start_port(AD_INFO *ai, int p, int ei)
666{
667 u8 _far *port_mmio = port_base(ai, p);
668 u32 status;
669
670 /* check whether device presence is detected and link established */
671 status = readl(port_mmio + PORT_SCR_STAT);
672 ddprintf(" PORT_SCR_STAT = 0x%lx\n", status);
673 if ((status & 0xf) != 3) {
674 return(-1);
675 }
676
677 /* clear SError, if any */
678 status = readl(port_mmio + PORT_SCR_ERR);
679 ddprintf(" PORT_SCR_ERR = 0x%lx\n", status);
680 writel(port_mmio + PORT_SCR_ERR, status);
681
682 /* enable FIS reception */
683 ahci_start_fis_rx(ai, p);
684
685 /* enable command engine */
686 ahci_start_engine(ai, p);
687
688 if (ei) {
689 /* clear any pending interrupts on this port */
690 if ((status = readl(port_mmio + PORT_IRQ_STAT)) != 0) {
691 writel(port_mmio + PORT_IRQ_STAT, status);
692 }
693
694 /* enable port interrupts */
695 writel(port_mmio + PORT_IRQ_MASK, PORT_IRQ_TF_ERR |
696 PORT_IRQ_HBUS_ERR |
697 PORT_IRQ_HBUS_DATA_ERR |
698 PORT_IRQ_IF_ERR |
699 PORT_IRQ_OVERFLOW |
700 PORT_IRQ_BAD_PMP |
701 PORT_IRQ_UNK_FIS |
702 PORT_IRQ_SDB_FIS |
703 PORT_IRQ_D2H_REG_FIS);
704 } else {
705 writel(port_mmio + PORT_IRQ_MASK, 0);
706 }
707 readl(port_mmio + PORT_IRQ_MASK); /* flush */
708
709 return(0);
710}
711
712/******************************************************************************
713 * Start port FIS reception. Copied from Linux AHCI driver and adopted to
714 * OS2AHCI.
715 */
716void ahci_start_fis_rx(AD_INFO *ai, int p)
717{
718 u8 _far *port_mmio = port_base(ai, p);
719 u32 port_dma = port_dma_base_phys(ai, p);
720 u32 tmp;
721
722 /* set comand header and FIS address registers */
723 writel(port_mmio + PORT_LST_ADDR, port_dma + offsetof(AHCI_PORT_DMA, cmd_hdr));
724 writel(port_mmio + PORT_LST_ADDR_HI, 0);
725 writel(port_mmio + PORT_FIS_ADDR, port_dma + offsetof(AHCI_PORT_DMA, rx_fis));
726 writel(port_mmio + PORT_FIS_ADDR_HI, 0);
727
728 /* enable FIS reception */
729 tmp = readl(port_mmio + PORT_CMD);
730 tmp |= PORT_CMD_FIS_RX;
731 writel(port_mmio + PORT_CMD, tmp);
732
733 /* flush */
734 readl(port_mmio + PORT_CMD);
735}
736
737/******************************************************************************
738 * Start port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
739 */
740void ahci_start_engine(AD_INFO *ai, int p)
741{
742 u8 _far *port_mmio = port_base(ai, p);
743 u32 tmp;
744
745 /* start DMA */
746 tmp = readl(port_mmio + PORT_CMD);
747 tmp |= PORT_CMD_START;
748 writel(port_mmio + PORT_CMD, tmp);
749 readl(port_mmio + PORT_CMD); /* flush */
750}
751
752/******************************************************************************
753 * Stop specified port
754 */
755int ahci_stop_port(AD_INFO *ai, int p)
756{
757 u8 _far *port_mmio = port_base(ai, p);
758 int rc;
759
760 /* disable port interrupts */
761 writel(port_mmio + PORT_IRQ_MASK, PORT_IRQ_TF_ERR);
762
763 /* disable FIS reception */
764 if ((rc = ahci_stop_fis_rx(ai, p)) != 0) {
765 dprintf("error: failed to stop FIS receive (%d)\n", rc);
766 return(rc);
767 }
768
769 /* disable command engine */
770 if ((rc = ahci_stop_engine(ai, p)) != 0) {
771 dprintf("error: failed to stop port HW engine (%d)\n", rc);
772 return(rc);
773 }
774
775 /* reset PxSACT register (tagged command queues, not reset by COMRESET) */
776 writel(port_mmio + PORT_SCR_ACT, 0);
777 readl(port_mmio + PORT_SCR_ACT); /* flush */
778
779 return(0);
780}
781
782/******************************************************************************
783 * Stop port FIS reception. Copied from Linux AHCI driver and adopted to
784 * OS2AHCI.
785 *
786 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
787 * should only be called at task time during initialization or in a
788 * context hook (e.g. when resetting a port).
789 */
790int ahci_stop_fis_rx(AD_INFO *ai, int p)
791{
792 u8 _far *port_mmio = port_base(ai, p);
793 int timeout = 1000;
794 u32 tmp;
795
796 /* disable FIS reception */
797 tmp = readl(port_mmio + PORT_CMD);
798 tmp &= ~PORT_CMD_FIS_RX;
799 writel(port_mmio + PORT_CMD, tmp);
800
801 /* wait for completion, spec says 500ms, give it 1000 */
802 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_FIS_ON)) {
803 mdelay(10);
804 timeout -= 10;
805 }
806
807 return((timeout <= 0) ? -1 : 0);
808}
809
810/******************************************************************************
811 * Stop port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
812 *
813 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
814 * should only be called at task time during initialization or in a
815 * context hook (e.g. when resetting a port).
816 */
817int ahci_stop_engine(AD_INFO *ai, int p)
818{
819 u8 _far *port_mmio = port_base(ai, p);
820 int timeout = 500;
821 u32 tmp;
822
823 tmp = readl(port_mmio + PORT_CMD);
824
825 /* check if the port is already stopped */
826 if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) {
827 return 0;
828 }
829
830 /* set port to idle */
831 tmp &= ~PORT_CMD_START;
832 writel(port_mmio + PORT_CMD, tmp);
833
834 /* wait for engine to stop. This could be as long as 500 msec */
835 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_LIST_ON)) {
836 mdelay(10);
837 timeout -= 10;
838 }
839
840 return((timeout <= 0) ? -1 : 0);
841}
842
843/******************************************************************************
844 * Execute AHCI command for given IORB. This includes all steps typically
845 * required by any of the ahci_*() IORB processing functions.
846 *
847 * NOTE: In order to prevent race conditions with port restart and reset
848 * handlers, we either need to keep the spinlock during the whole
849 * operation or set the adapter's busy flag. Since the expectation
850 * is that command preparation will be quick (it certainly doesn't
851 * involve delays), we're going with the spinlock for the time being.
852 */
853void ahci_exec_iorb(IORBH _far *iorb, int ncq_capable,
854 int (*func)(IORBH _far *, int))
855{
856 volatile u32 *cmds;
857 ADD_WORKSPACE _far *aws = add_workspace(iorb);
858 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
859 P_INFO *port = ai->ports + iorb_unit_port(iorb);
860 ULONG timeout = (iorb->Timeout > 0) ? iorb->Timeout : DEFAULT_TIMEOUT;
861 u8 _far *port_mmio = port_base(ai, iorb_unit_port(iorb));
862 u16 cmd_max = ai->cmd_max;
863 int i;
864
865 /* Enable AHCI mode; apparently, the AHCI mode may end up becoming
866 * disabled, either during the boot sequence (by the BIOS) or by
867 * something else. The Linux AHCI drivers have this call in the
868 * command processing chain, and apparently for a good reason because
869 * without this, commands won't be executed.
870 */
871 ahci_enable_ahci(ai);
872
873 /* determine whether this will be an NCQ request */
874 aws->is_ncq = 0;
875 if (ncq_capable && port->devs[iorb_unit_device(iorb)].ncq_max > 1 &&
876 (ai->cap & HOST_CAP_NCQ) && !aws->no_ncq && init_complete) {
877
878 /* We can make this an NCQ request; limit command slots to the maximum
879 * NCQ tag number reported by the device - 1. Why "minus one"? I seem to
880 * recall an issue related to using all 32 tag numbers but can't quite
881 * pinpoint it right now. One less won't make much of a difference...
882 */
883 aws->is_ncq = 1;
884 if ((cmd_max = port->devs[iorb_unit_device(iorb)].ncq_max - 1) > ai->cmd_max) {
885 cmd_max = ai->cmd_max;
886 }
887 ddprintf("NCQ command; cmd_max = %d->%d\n", (u16) ai->cmd_max, cmd_max);
888 }
889
890 /* make sure adapter is available */
891 spin_lock(drv_lock);
892 if (!ai->busy) {
893
894 if (!init_complete) {
895 ai->busy = 1;
896 spin_unlock(drv_lock);
897 ahci_exec_polled_iorb(iorb, func, timeout);
898 ai->busy = 0;
899 return;
900 }
901
902 /* make sure we don't mix NCQ and regular commands */
903 if (aws->is_ncq && port->reg_cmds == 0 || !aws->is_ncq && port->ncq_cmds == 0) {
904
905 /* Find next available command slot. We use a simple round-robin
906 * algorithm for this to prevent commands with higher slot indexes
907 * from stalling when new commands are coming in frequently.
908 */
909 cmds = (aws->is_ncq) ? &port->ncq_cmds : &port->reg_cmds;
910 for (i = 0; i <= cmd_max; i++) {
911 if (++(port->cmd_slot) > cmd_max) {
912 port->cmd_slot = 0;
913 }
914 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
915 break;
916 }
917 }
918
919 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
920 /* prepare command */
921 if (func(iorb, port->cmd_slot)) {
922 /* Command preparation failed, or no HW command required; IORB
923 * will already have the error code if there was an error.
924 */
925 spin_unlock(drv_lock);
926 iorb_done(iorb);
927 return;
928 }
929
930 /* start timer for this IORB */
931 ADD_StartTimerMS(&aws->timer, timeout, (PFN) timeout_callback, iorb, 0);
932
933 /* update IORB */
934 aws->queued_hw = 1;
935 aws->cmd_slot = port->cmd_slot;
936
937 /* issue command to hardware */
938 ddprintf("issuing command on slot %d\n", port->cmd_slot);
939 *cmds |= (1UL << port->cmd_slot);
940 if (aws->is_ncq) {
941 writel(port_mmio + PORT_SCR_ACT, (1UL << port->cmd_slot));
942 readl(port_mmio + PORT_SCR_ACT); /* flush */
943 }
944 writel(port_mmio + PORT_CMD_ISSUE, (1UL << port->cmd_slot));
945 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
946
947 spin_unlock(drv_lock);
948 return;
949 }
950 }
951 }
952
953 /* requeue this IORB; it will be picked up again in trigger_engine() */
954 aws->processing = 0;
955 spin_unlock(drv_lock);
956}
957
958/******************************************************************************
959 * Execute polled IORB command. This function is called by ahci_exec_iorb()
960 * when the initialization has not yet completed. The reasons for polling until
961 * initialization has completed are:
962 *
963 * - We need to restore the BIOS configuration after we're done with this
964 * command because someone might still call int 13h routines; sending
965 * asynchronous commands and waiting for interrupts to indicate completion
966 * won't work in such a scenario.
967 * - Our context hooks won't work while the device managers are initializing
968 * (they can't yield at init time).
969 * - The device managers typically poll for command completion during
970 * initialization so it won't make much of a difference, anyway.
971 *
972 * NOTE: This function must be called with the adapter-level busy flag set but
973 * without the driver-level spinlock held.
974 */
975void ahci_exec_polled_iorb(IORBH _far *iorb, int (*func)(IORBH _far *, int),
976 ULONG timeout)
977{
978 AHCI_PORT_CFG *pc = NULL;
979 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
980 int p = iorb_unit_port(iorb);
981 u8 _far *port_mmio = port_base(ai, p);
982
983 /* enable AHCI mode */
984 if (ahci_enable_ahci(ai) != 0) {
985 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
986 goto restore_bios_config;
987 }
988
989 /* check whether command slot 0 is available */
990 if ((readl(port_mmio + PORT_CMD_ISSUE) & 1) != 0) {
991 iorb_seterr(iorb, IOERR_DEVICE_BUSY);
992 goto restore_bios_config;
993 }
994
995 /* save port configuration */
996 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
997 iorb_seterr(iorb, IOERR_CMD_SW_RESOURCE);
998 goto restore_bios_config;
999 }
1000
1001 /* restart port (includes the necessary port configuration) */
1002 if (ahci_stop_port(ai, p) || ahci_start_port(ai, p, 0)) {
1003 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
1004 goto restore_bios_config;
1005 }
1006
1007 /* prepare command */
1008 if (func(iorb, 0) == 0) {
1009 /* successfully prepared cmd; issue cmd and wait for completion */
1010 ddprintf("executing polled cmd...");
1011 writel(port_mmio + PORT_CMD_ISSUE, 1);
1012 timeout /= 10;
1013 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
1014 mdelay(10);
1015 timeout--;
1016 }
1017 ddprintf(" done (time left = %ld)\n", timeout * 10);
1018
1019 if (timeout == 0) {
1020 dprintf("timeout for IORB %Fp\n", iorb);
1021 iorb_seterr(iorb, IOERR_ADAPTER_TIMEOUT);
1022
1023 } else if (readl(port_mmio + PORT_SCR_ERR) != 0 ||
1024 readl(port_mmio + PORT_TFDATA) & 0x89) {
1025 dprintf("polled cmd error for IORB %Fp\n", iorb);
1026 iorb_seterr(iorb, IOERR_DEVICE_NONSPECIFIC);
1027 ahci_reset_port(ai, iorb_unit_port(iorb), 0);
1028
1029 } else {
1030 /* successfully executed command */
1031 if (add_workspace(iorb)->ppfunc != NULL) {
1032 add_workspace(iorb)->ppfunc(iorb);
1033 } else {
1034 add_workspace(iorb)->complete = 1;
1035 }
1036 }
1037 }
1038
1039restore_bios_config:
1040 /* restore BIOS configuration */
1041 if (pc != NULL) {
1042 ahci_restore_port_config(ai, p, pc);
1043 }
1044 ahci_restore_bios_config(ai);
1045
1046 if (add_workspace(iorb)->complete | (iorb->Status | IORB_ERROR)) {
1047 iorb_done(iorb);
1048 }
1049 return;
1050}
1051
1052/******************************************************************************
1053 * Execute polled ATA/ATAPI command. This function will block until the command
1054 * has completed or the timeout has expired, thus it should only be used during
1055 * initialization. Furthermore, it will always use command slot zero.
1056 *
1057 * The difference to ahci_exec_polled_iorb() is that this function executes
1058 * arbitrary ATA/ATAPI commands outside the context of an IORB. It's typically
1059 * used when scanning for devices during initialization.
1060 */
1061int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...)
1062{
1063 va_list va;
1064 u8 _far *port_mmio = port_base(ai, p);
1065 u32 tmp;
1066 int rc;
1067
1068 /* verify that command slot 0 is idle */
1069 if (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
1070 ddprintf("port %d slot 0 is not idle; not executing polled cmd\n", p);
1071 return(-1);
1072 }
1073
1074 /* fill in command slot 0 */
1075 va_start(va, cmd);
1076 if ((rc = v_ata_cmd(ai, p, d, 0, cmd, va)) != 0) {
1077 return(rc);
1078 }
1079
1080 /* start command execution for slot 0 */
1081 ddprintf("executing polled cmd...");
1082 writel(port_mmio + PORT_CMD_ISSUE, 1);
1083
1084 /* wait until command has completed */
1085 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
1086 mdelay(10);
1087 timeout -= 10;
1088 }
1089 ddprintf(" done (time left = %d)\n", timeout);
1090
1091 /* check error condition */
1092 if ((tmp = readl(port_mmio + PORT_SCR_ERR)) != 0) {
1093 dprintf("SERR = 0x%08lx\n", tmp);
1094 timeout = 0;
1095 }
1096 if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
1097 dprintf("TFDATA = 0x%08lx\n", tmp);
1098 timeout = 0;
1099 }
1100
1101 if (timeout <= 0) {
1102 ahci_reset_port(ai, p, 0);
1103 return(-1);
1104 }
1105 return(0);
1106}
1107
1108/******************************************************************************
1109 * Flush write cache of the specified device. Since there's no equivalent IORB
1110 * command, we'll execute this command directly using polling. Otherwise, we
1111 * would have to create a fake IORB, add it to the port's IORB queue, ...
1112 *
1113 * Besides, this function is only called when shutting down and the code there
1114 * would have to wait for the flush cache command to complete as well, using
1115 * polling just the same...
1116 */
1117int ahci_flush_cache(AD_INFO *ai, int p, int d)
1118{
1119 if (!ai->ports[p].devs[d].atapi) {
1120 dprintf("flushing cache on %d.%d.%d\n", ad_no(ai), p, d);
1121 return(ahci_exec_polled_cmd(ai, p, d, 30000,
1122 ai->ports[p].devs[d].lba48 ? ATA_CMD_FLUSH_EXT
1123 : ATA_CMD_FLUSH,
1124 AP_END));
1125 }
1126}
1127
1128/******************************************************************************
1129 * set device into IDLE mode (spin down); this was used during
1130 * debugging/testing and is still there since it does not hurt...
1131 * If 'idle' is != 0, the idle timeout is set to 5 seconds, otherwise it
1132 * is turned off.
1133 */
1134int ahci_set_dev_idle(AD_INFO *ai, int p, int d, int idle)
1135{
1136 ddprintf("sending IDLE=%d command to port %d\n", idle, p);
1137 return ahci_exec_polled_cmd(ai, p, d, 500, ATA_CMD_IDLE, AP_COUNT,
1138 idle ? 1 : 0, AP_END);
1139}
1140
1141/******************************************************************************
1142 * AHCI top-level hardware interrupt handler. This handler finds the adapters
1143 * and ports which have issued the interrupt and calls the corresponding
1144 * port interrupt handler.
1145 *
1146 * On entry, OS/2 will have processor interrupts enabled because we're using
1147 * shared IRQs but we won't be preempted by another interrupt on the same
1148 * IRQ level until we indicated EOI. We'll keep it this way, only requesting
1149 * the driver-level spinlock when actually changing the driver state (IORB
1150 * queues, ...)
1151 */
1152int ahci_intr(u16 irq)
1153{
1154 u32 irq_stat;
1155 int handled = 0;
1156 int a;
1157 int p;
1158
1159 /* find adapter(s) with pending interrupts */
1160 for (a = 0; a < ad_info_cnt; a++) {
1161 AD_INFO *ai = ad_infos + a;
1162
1163 if (ai->irq == irq && (irq_stat = readl(ai->mmio + HOST_IRQ_STAT)) != 0) {
1164 /* this adapter has interrupts pending */
1165 u32 irq_masked = irq_stat & ai->port_map;
1166
1167 for (p = 0; p <= ai->port_max; p++) {
1168 if (irq_masked & (1UL << p)) {
1169 ahci_port_intr(ai, p);
1170 }
1171 }
1172
1173 /* clear interrupt condition on the adapter */
1174 writel(ai->mmio + HOST_IRQ_STAT, irq_stat);
1175 readl(ai->mmio + HOST_IRQ_STAT); /* flush */
1176 handled = 1;
1177 }
1178 }
1179
1180 if (handled) {
1181 /* trigger state machine to process next IORBs, if any */
1182 spin_lock(drv_lock);
1183 trigger_engine();
1184 spin_unlock(drv_lock);
1185
1186 /* complete the interrupt */
1187 DevHelp_EOI(irq);
1188 return(0);
1189 } else {
1190 return(1);
1191 }
1192}
1193
1194/******************************************************************************
1195 * AHCI port-level interrupt handler. As described above, processor interrupts
1196 * are enabled on entry thus we have to protect shared resources with a
1197 * spinlock.
1198 */
1199void ahci_port_intr(AD_INFO *ai, int p)
1200{
1201 IORB_QUEUE done_queue;
1202 IORBH _far *iorb;
1203 IORBH _far *next = NULL;
1204 u8 _far *port_mmio = port_base(ai, p);
1205 u32 irq_stat;
1206 u32 active_cmds;
1207 u32 done_mask;
1208
1209 ddprintf("port interrupt for adapter #%d, port #%d\n", ad_no(ai), p);
1210 memset(&done_queue, 0x00, sizeof(done_queue));
1211
1212 /* get interrupt status and clear it right away */
1213 irq_stat = readl(port_mmio + PORT_IRQ_STAT);
1214 writel(port_mmio + PORT_IRQ_STAT, irq_stat);
1215 readl(port_mmio + PORT_IRQ_STAT); /* flush */
1216
1217 if (irq_stat & PORT_IRQ_ERROR) {
1218 /* this is an error interrupt */
1219 ahci_error_intr(ai, p, irq_stat);
1220 return;
1221 }
1222
1223 spin_lock(drv_lock);
1224
1225 /* Find out which command slots have completed. Since error recovery for
1226 * NCQ commands interfers with non-NCQ commands, the upper layers will
1227 * make sure there's never a mixture of NCQ and non-NCQ commands active
1228 * on any port at any given time. This makes it easier to find out which
1229 * commands have completed, too.
1230 */
1231 if (ai->ports[p].ncq_cmds != 0) {
1232 active_cmds = readl(port_mmio + PORT_SCR_ACT);
1233 done_mask = ai->ports[p].ncq_cmds ^ active_cmds;
1234 ddprintf("[ncq_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1235 active_cmds, done_mask);
1236 } else {
1237 active_cmds = readl(port_mmio + PORT_CMD_ISSUE);
1238 done_mask = ai->ports[p].reg_cmds ^ active_cmds;
1239 ddprintf("[reg_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1240 active_cmds, done_mask);
1241 }
1242
1243 /* Find the IORBs related to the completed commands and complete them.
1244 *
1245 * NOTES: The spinlock must not be released while in this loop to prevent
1246 * race conditions with timeout handlers or other threads in SMP
1247 * systems.
1248 *
1249 * Since we hold the spinlock when IORBs complete, we can't call the
1250 * IORB notification routine right away because this routine might
1251 * schedule another IORB which could cause a deadlock. Thus, we'll
1252 * add all IORBs to be completed to a temporary queue which will be
1253 * processed after releasing the spinlock.
1254 */
1255 for (iorb = ai->ports[p].iorb_queue.root; iorb != NULL; iorb = next) {
1256 ADD_WORKSPACE _far *aws = (ADD_WORKSPACE _far *) &iorb->ADDWorkSpace;
1257 next = iorb->pNxtIORB;
1258 if (aws->queued_hw && (done_mask & (1UL << aws->cmd_slot))) {
1259 /* this command has completed */
1260 if (aws->ppfunc != NULL) {
1261 aws->ppfunc(iorb);
1262 } else {
1263 aws->complete = 1;
1264 }
1265
1266 if (aws->complete) {
1267 /* this IORB is complete; move IORB to our temporary done queue */
1268 iorb_queue_del(&ai->ports[p].iorb_queue, iorb);
1269 iorb_queue_add(&done_queue, iorb);
1270 }
1271
1272 /* clear corresponding bit in issued command bitmaps */
1273 ai->ports[p].ncq_cmds &= ~(1UL << aws->cmd_slot);
1274 ai->ports[p].reg_cmds &= ~(1UL << aws->cmd_slot);
1275 }
1276 }
1277
1278 spin_unlock(drv_lock);
1279
1280 /* call notification routines for all IORBs in the done queue */
1281 for (iorb = done_queue.root; iorb != NULL; iorb = next) {
1282 next = iorb->pNxtIORB;
1283 iorb->Status = IORB_DONE;
1284 aws_free(add_workspace(iorb));
1285 if (iorb->RequestControl & IORB_ASYNC_POST) {
1286 iorb->NotifyAddress(iorb);
1287 }
1288 }
1289}
1290
1291/******************************************************************************
1292 * AHCI error interrupt handler. Errors include interface errors and device
1293 * errors (usually triggered by the error bit in the AHCI task file register).
1294 *
1295 * Since this involves long-running operations such as restarting or even
1296 * resetting a port, this function is invoked at task time via a context
1297 * hook.
1298 *
1299 * NOTE: AHCI controllers stop all processing when encountering an error
1300 * condition in order to give the driver time to find out what exactly
1301 * went wrong. This means no new commands will be processed until we
1302 * clear the error register and restore the "commands issued" register.
1303 */
1304void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat)
1305{
1306 int reset_port = 0;
1307
1308 /* Handle adapter and interface errors. Those typically require a port
1309 * reset, or worse.
1310 */
1311 if (irq_stat & PORT_IRQ_UNK_FIS) {
1312 u32 _far *unk = (u32 _far *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK);
1313 dprintf("warning: unknown FIS %08lx %08lx %08lx %08lx\n",
1314 unk[0], unk[1], unk[2], unk[3]);
1315 reset_port = 1;
1316 }
1317 if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) {
1318 dprintf("warning: host bus [data] error for port #%d\n", p);
1319 reset_port = 1;
1320 }
1321 if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR)) {
1322 dprintf("warning: interface fatal error for port #%d\n", p);
1323 reset_port = 1;
1324 }
1325 if (reset_port) {
1326 /* need to reset the port; leave this to the reset context hook */
1327 ports_to_reset[ad_no(ai)] |= 1UL << p;
1328 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1329
1330 /* no point analyzing device errors after a reset... */
1331 return;
1332 }
1333
1334 /* Handle device-specific errors. Those errors typically involve restarting
1335 * the corresponding port to resume operations which can take some time,
1336 * thus we need to offload this functionality to the restart context hook.
1337 */
1338 if (irq_stat & PORT_IRQ_TF_ERR) {
1339 ports_to_restart[ad_no(ai)] |= 1UL << p;
1340 DevHelp_ArmCtxHook(0, restart_ctxhook_h);
1341 }
1342}
1343
1344/******************************************************************************
1345 * Get device or media geometry. Device and media geometry are expected to be
1346 * the same for non-removable devices.
1347 */
1348void ahci_get_geometry(IORBH _far *iorb)
1349{
1350 dprintf("ahci_get_geometry(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
1351 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1352
1353 ahci_exec_iorb(iorb, 0, cmd_func(iorb, get_geometry));
1354}
1355
1356/******************************************************************************
1357 * Test whether unit is ready.
1358 */
1359void ahci_unit_ready(IORBH _far *iorb)
1360{
1361 dprintf("ahci_unit_ready(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
1362 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1363
1364 ahci_exec_iorb(iorb, 0, cmd_func(iorb, unit_ready));
1365}
1366
1367/******************************************************************************
1368 * Read sectors from AHCI device.
1369 */
1370void ahci_read(IORBH _far *iorb)
1371{
1372 dprintf("ahci_read(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1373 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1374 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1375 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1376
1377 ahci_exec_iorb(iorb, 1, cmd_func(iorb, read));
1378}
1379
1380/******************************************************************************
1381 * Verify readability of sectors on AHCI device.
1382 */
1383void ahci_verify(IORBH _far *iorb)
1384{
1385 dprintf("ahci_verify(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1386 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1387 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1388 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1389
1390 ahci_exec_iorb(iorb, 0, cmd_func(iorb, verify));
1391}
1392
1393/******************************************************************************
1394 * Write sectors to AHCI device.
1395 */
1396void ahci_write(IORBH _far *iorb)
1397{
1398 dprintf("ahci_write(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1399 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1400 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1401 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1402
1403 ahci_exec_iorb(iorb, 1, cmd_func(iorb, write));
1404}
1405
1406/******************************************************************************
1407 * Execute SCSI (ATAPI) command.
1408 */
1409void ahci_execute_cdb(IORBH _far *iorb)
1410{
1411 int a = iorb_unit_adapter(iorb);
1412 int p = iorb_unit_port(iorb);
1413 int d = iorb_unit_device(iorb);
1414
1415 dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
1416 ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
1417 "ahci_execute_cdb(%d.%d.%d): ", a, p, d);
1418
1419 if (ad_infos[a].ports[p].devs[d].atapi) {
1420 ahci_exec_iorb(iorb, 0, atapi_execute_cdb);
1421 } else {
1422 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1423 iorb_done(iorb);
1424 }
1425}
1426
1427/******************************************************************************
1428 * Execute ATA command.
1429 */
1430void ahci_execute_ata(IORBH _far *iorb)
1431{
1432 int a = iorb_unit_adapter(iorb);
1433 int p = iorb_unit_port(iorb);
1434 int d = iorb_unit_device(iorb);
1435
1436 dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
1437 ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
1438 "ahci_execute_cdb(%d.%d.%d): ", a, p, d);
1439
1440 if (ad_infos[a].ports[p].devs[d].atapi) {
1441 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1442 iorb_done(iorb);
1443 } else {
1444 ahci_exec_iorb(iorb, 0, ata_execute_ata);
1445 }
1446}
1447
1448/******************************************************************************
1449 * Set up device attached to the specified port based on ATA_IDENTFY_DEVICE or
1450 * ATA_IDENTFY_PACKET_DEVICE data.
1451 *
1452 * NOTE: Port multipliers are not supported, yet, thus the device number is
1453 * expected to be 0 for the time being.
1454 */
1455static void ahci_setup_device(AD_INFO *ai, int p, int d, u16 *id_buf)
1456{
1457 DEVICESTRUCT ds;
1458 ADJUNCT adj;
1459 HDEVICE dh;
1460 char dev_name[RM_MAX_PREFIX_LEN+ATA_ID_PROD_LEN+1];
1461 static u8 total_dev_cnt;
1462
1463 if (ai->port_max < p) {
1464 ai->port_max = p;
1465 }
1466 if (ai->ports[p].dev_max < d) {
1467 ai->ports[p].dev_max = d;
1468 }
1469 memset(ai->ports[p].devs + d, 0x00, sizeof(*ai->ports[p].devs));
1470
1471 /* set generic device information (assuming an ATA disk device for now) */
1472 ai->ports[p].devs[d].present = 1;
1473 ai->ports[p].devs[d].removable = (id_buf[ATA_ID_CONFIG] & 0x0080U) != 0;
1474 ai->ports[p].devs[d].dev_type = UIB_TYPE_DISK;
1475
1476 if (id_buf[ATA_ID_CONFIG] & 0x8000U) {
1477 /* this is an ATAPI device; augment device information */
1478 ai->ports[p].devs[d].atapi = 1;
1479 ai->ports[p].devs[d].atapi_16 = (id_buf[ATA_ID_CONFIG] & 0x0001U) != 0;
1480 ai->ports[p].devs[d].dev_type = (id_buf[ATA_ID_CONFIG] & 0x1f00U) >> 8;
1481 ai->ports[p].devs[d].ncq_max = 1;
1482
1483 } else {
1484 /* complete ATA-specific device information */
1485 if (disable_ncq[ad_no(ai)][p]) {
1486 /* MT: set ncq_max to 1 if NCQ is disabled for this port */
1487 ai->ports[p].devs[d].ncq_max = 1;
1488 dprintf("NCQ off for a:%d p:%d\n", (int) ad_no(ai), p);
1489 } else {
1490 ai->ports[p].devs[d].ncq_max = max(id_buf[ATA_ID_QUEUE_DEPTH] & 0x001fU, 1);
1491 dprintf("NCQ max=%d for a:%d p:%d\n", ai->ports[p].devs[d].ncq_max,
1492 (int) ad_no(ai), p);
1493 }
1494
1495 if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x0400U) {
1496 ai->ports[p].devs[d].lba48 = 1;
1497 }
1498 }
1499
1500 dprintf("found device %d.%d.%d: removable = %d, dev_type = %d, atapi = %d\n",
1501 ad_no(ai), p, d,
1502 ai->ports[p].devs[d].removable,
1503 ai->ports[p].devs[d].dev_type,
1504 ai->ports[p].devs[d].atapi);
1505
1506 /* add device to resource manager; we don't really care about errors here */
1507 memset(&ds, 0x00, sizeof(ds));
1508 memset(&adj, 0x00, sizeof(adj));
1509
1510 adj.pNextAdj = NULL;
1511 adj.AdjLength = sizeof(adj);
1512 adj.AdjType = ADJ_ADD_UNIT;
1513 adj.Add_Unit.ADDHandle = rm_drvh;
1514 adj.Add_Unit.UnitHandle = (USHORT) total_dev_cnt;
1515
1516 /* create Resource Manager device key string;
1517 * we distinguish only HDs and CD drives for now
1518 */
1519 if (ai->ports[p].devs[d].removable) {
1520 sprintf(dev_name, RM_CD_PREFIX "%s", p, d, ata_dev_name(id_buf));
1521 } else {
1522 sprintf(dev_name, RM_HD_PREFIX "%s", p, d, ata_dev_name(id_buf));
1523 }
1524
1525 ds.DevDescriptName = dev_name;
1526 ds.DevFlags = (ai->ports[p].devs[d].removable) ? DS_REMOVEABLE_MEDIA
1527 : DS_FIXED_LOGICALNAME;
1528 ds.DevType = ai->ports[p].devs[d].dev_type;
1529 ds.pAdjunctList = &adj;
1530
1531 RMCreateDevice(rm_drvh, &dh, &ds, ai->rm_adh, NULL);
1532
1533 total_dev_cnt++;
1534
1535 /* try to detect virtualbox environment to enable a hack for IRQ routing */
1536 if (ai == ad_infos && p == 7 &&
1537 ai->pci->vendor == 0x8086 && ai->pci->device == 0x2829 &&
1538 !memcmp(ata_dev_name(id_buf), "VBOX HARDDISK", 13)) {
1539 /* running inside virtualbox */
1540 pci_hack_virtualbox();
1541 }
1542}
1543
1544
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