source: trunk/src/os2ahci/ahci.c@ 42

Last change on this file since 42 was 42, checked in by markus, 15 years ago

fixed NCQ disabling via switch
File size: 54.3 KB
Line 
1/******************************************************************************
2 * ahci.c - ahci hardware access functions
3 *
4 * Copyright (c) 2010 Christian Mueller. Parts copied from/inspired by the
5 * Linux AHCI driver; those parts are (c) Linux AHCI/ATA maintainers
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include "os2ahci.h"
23#include "ata.h"
24#include "atapi.h"
25
26/* -------------------------- macros and constants ------------------------- */
27
28/* produce ata/atapi function pointer with the given func name */
29#define cmd_func(iorb, func) ad_infos[iorb_unit_adapter(iorb)]. \
30 ports[iorb_unit_port(iorb)]. \
31 devs[iorb_unit_device(iorb)].atapi \
32 ? atapi_##func : ata_##func
33
34
35/* ------------------------ typedefs and structures ------------------------ */
36
37/* -------------------------- function prototypes -------------------------- */
38
39static void ahci_setup_device (AD_INFO *ai, int p, int d, u16 *id_buf);
40static void _cdecl _far timeout_callback (ULONG timer_handle, ULONG p1, ULONG p2);
41
42/* ------------------------ global/static variables ------------------------ */
43
44/* Initial driver status flags indexed by the board_* constants in os2ahci.h
45 *
46 * NOTE: The Linux AHCI driver uses a combination of board-specific quirk
47 * flags and overriding certain libata service functions to handle
48 * adapter flaws. However, there were only three overrides at the time
49 * os2ahci was written, one for hard adapter resets and two for port
50 * resets, and we can easily implement those within the corresponding
51 * reset handlers. If this becomes more complex, this array of flags
52 * should be converted into a structure array which contains function
53 * pointers to all handler functions which may need to be overridden.
54 */
55u16 initial_flags[] = {
56 0, /* board_ahci */
57 AHCI_HFLAG_NO_NCQ | /* board_ahci_vt8251 */
58 AHCI_HFLAG_NO_PMP,
59 AHCI_HFLAG_IGN_IRQ_IF_ERR, /* board_ahci_ign_iferr */
60 AHCI_HFLAG_IGN_SERR_INTERNAL | /* board_ahci_sb600 */
61 AHCI_HFLAG_NO_MSI |
62 AHCI_HFLAG_SECT255 |
63 AHCI_HFLAG_32BIT_ONLY,
64 AHCI_HFLAG_NO_NCQ | /* board_ahci_mv */
65 AHCI_HFLAG_NO_MSI |
66 AHCI_HFLAG_MV_PATA |
67 AHCI_HFLAG_NO_PMP,
68 AHCI_HFLAG_IGN_SERR_INTERNAL, /* board_ahci_sb700 */
69 AHCI_HFLAG_YES_NCQ, /* board_ahci_mcp65 */
70 AHCI_HFLAG_NO_PMP, /* board_ahci_nopmp */
71 AHCI_HFLAG_YES_NCQ, /* board_ahci_yesncq */
72 AHCI_HFLAG_NO_SNTF, /* board_ahci_nosntf */
73};
74
75/* IRQ levels for stub interrupt handlers. OS/2 calls interrupt handlers
76 * without passing the IRQ level, yet it expects the interrupt handler to
77 * know the IRQ level for EOI processing. Thus we need multiple interrupt
78 * handlers, one for each IRQ, and some mapping from the interrupt handler
79 * index to the corresponding IRQ.
80 */
81static u16 irq_map[MAX_AD]; /* IRQ level for each stub IRQ func */
82static int irq_map_cnt; /* number of IRQ stub funcs used */
83
84/* ----------------------------- start of code ----------------------------- */
85
86/******************************************************************************
87 * Interrupt handlers. Those are stubs which call the real interrupt handler
88 * with the IRQ level as parameter. This mapping is required because OS/2
89 * calls interrupt handlers without any parameters, yet expects them to know
90 * which IRQ level to complete when calling DevHelp_EOI().
91 *
92 * This array of functions needs to be extended when increasing MAX_AD.
93 */
94#if MAX_AD > 8
95#error must extend irq_handler_xx and irq_handlers[] when increasing MAX_AD
96#endif
97
98/* Macro to call AHCI interrupt handler and set/clear carry flag accordingly.
99 * We need to set the carry flag if the interrupt was not handled. This is
100 * done by shifting the return value of ahci_intr() to the right, implying
101 * bit 0 will be set when the interrupt was not handled.
102 */
103#define call_ahci_intr(i) return(ahci_intr(irq_map[i]) >> 1)
104
105static USHORT _cdecl _far irq_handler_00(void) { call_ahci_intr(0); }
106static USHORT _cdecl _far irq_handler_01(void) { call_ahci_intr(1); }
107static USHORT _cdecl _far irq_handler_02(void) { call_ahci_intr(2); }
108static USHORT _cdecl _far irq_handler_03(void) { call_ahci_intr(3); }
109static USHORT _cdecl _far irq_handler_04(void) { call_ahci_intr(4); }
110static USHORT _cdecl _far irq_handler_05(void) { call_ahci_intr(5); }
111static USHORT _cdecl _far irq_handler_06(void) { call_ahci_intr(6); }
112static USHORT _cdecl _far irq_handler_07(void) { call_ahci_intr(7); }
113
114PFN irq_handlers[] = {
115 (PFN) irq_handler_00, (PFN) irq_handler_01, (PFN) irq_handler_02,
116 (PFN) irq_handler_03, (PFN) irq_handler_04, (PFN) irq_handler_05,
117 (PFN) irq_handler_06, (PFN) irq_handler_07
118};
119
120/******************************************************************************
121 * Save BIOS configuration of AHCI adapter. As a side effect, this also saves
122 * generic configuration information which we may have to restore after an
123 * adapter reset.
124 *
125 * NOTE: This function also saves working copies of the CAP and CAP2 registers
126 * as well as the initial port map in the AD_INFO structure after
127 * removing features which are known to cause trouble on this specific
128 * piece of hardware.
129 */
130int ahci_save_bios_config(AD_INFO *ai)
131{
132 int ports;
133 int i;
134
135 /* save BIOS configuration */
136 for (i = 0; i < HOST_CAP2; i += sizeof(u32)) {
137 ai->bios_config[i / sizeof(u32)] = readl(ai->mmio + i);
138 }
139
140 /* HOST_CAP2 only exists for AHCI V1.2 and later */
141 if (ai->bios_config[HOST_VERSION / sizeof(u32)] >= 0x00010200L) {
142 ai->bios_config[HOST_CAP2 / sizeof(u32)] = readl(ai->mmio + HOST_CAP2);
143 } else {
144 ai->bios_config[HOST_CAP2 / sizeof(u32)] = 0;
145 }
146
147 /* print AHCI register debug information */
148 if (debug) {
149 printf("AHCI global controller registers:\n");
150 for (i = 0; i <= HOST_CAP2 / sizeof(u32); i++) {
151 u32 val = ai->bios_config[i];
152 printf(" %02x: %08lx", i, val);
153
154 if (i == HOST_CAP) {
155 printf(" -");
156 if (val & HOST_CAP_64) printf(" 64bit");
157 if (val & HOST_CAP_NCQ) printf(" ncq");
158 if (val & HOST_CAP_SNTF) printf(" sntf");
159 if (val & HOST_CAP_MPS) printf(" mps");
160 if (val & HOST_CAP_SSS) printf(" sss");
161 if (val & HOST_CAP_ALPM) printf(" alpm");
162 if (val & HOST_CAP_LED) printf(" led");
163 if (val & HOST_CAP_CLO) printf(" clo");
164 if (val & HOST_CAP_ONLY) printf(" ahci_only");
165 if (val & HOST_CAP_PMP) printf(" pmp");
166 if (val & HOST_CAP_FBS) printf(" fbs");
167 if (val & HOST_CAP_PIO_MULTI) printf(" pio_multi");
168 if (val & HOST_CAP_SSC) printf(" ssc");
169 if (val & HOST_CAP_PART) printf(" part");
170 if (val & HOST_CAP_CCC) printf(" ccc");
171 if (val & HOST_CAP_EMS) printf(" ems");
172 if (val & HOST_CAP_SXS) printf(" sxs");
173 printf(" cmd_slots:%d", (u16) ((val >> 8) & 0x1f) + 1);
174 printf(" ports:%d", (u16) (val & 0x1f) + 1);
175
176 } else if (i == HOST_CTL) {
177 printf(" -");
178 if (val & HOST_AHCI_EN) printf(" ahci_enabled");
179 if (val & HOST_IRQ_EN) printf(" irq_enabled");
180 if (val & HOST_RESET) printf(" resetting");
181
182 } else if (i == HOST_CAP2) {
183 printf(" -");
184 if (val & HOST_CAP2_BOH) printf(" boh");
185 if (val & HOST_CAP2_NVMHCI) printf(" nvmhci");
186 if (val & HOST_CAP2_APST) printf(" apst");
187
188 }
189 printf("\n");
190 }
191 }
192
193 /* Save working copies of CAP, CAP2 and port_map and remove broken feature
194 * bits. This is largely copied from the Linux AHCI driver -- the wisdom
195 * around quirks and faulty hardware is hard to come by...
196 */
197 ai->cap = ai->bios_config[HOST_CAP / sizeof(u32)];
198 ai->cap2 = ai->bios_config[HOST_CAP2 / sizeof(u32)];
199 ai->port_map = ai->bios_config[HOST_PORTS_IMPL / sizeof(u32)];
200
201 if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags)) {
202 dprintf("error: invalid board index in PCI info\n");
203 return(-1);
204 }
205 ai->flags = initial_flags[ai->pci->board];
206
207 if ((ai->cap & HOST_CAP_64) && (ai->flags & AHCI_HFLAG_32BIT_ONLY)) {
208 /* disable 64-bit support for faulty controllers; OS/2 can't do 64 bits at
209 * this point, of course, but who knows where all this will be in a few
210 * years...
211 */
212 ai->cap &= ~HOST_CAP_64;
213 }
214
215 if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ)) {
216 dprintf("controller can't do NCQ, turning off CAP_NCQ\n");
217 ai->cap &= ~HOST_CAP_NCQ;
218 }
219
220 if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ)) {
221 dprintf("controller can do NCQ, turning on CAP_NCQ\n");
222 ai->cap |= HOST_CAP_NCQ;
223 }
224
225 if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP)) {
226 dprintf("controller can't do PMP, turning off CAP_PMP\n");
227 ai->cap |= HOST_CAP_PMP;
228 }
229
230 if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF)) {
231 dprintf("controller can't do SNTF, turning off CAP_SNTF\n");
232 ai->cap &= ~HOST_CAP_SNTF;
233 }
234
235 if (ai->pci->vendor == PCI_VENDOR_ID_JMICRON &&
236 ai->pci->device == 0x2361 && ai->port_map != 1) {
237 dprintf("JMB361 has only one port, port_map 0x%x -> 0x%x\n", ai->port_map, 1);
238 ai->port_map = 1;
239 }
240
241 /* Correlate port map to number of ports reported in HOST_CAP
242 *
243 * NOTE: Port map and number of ports handling differs a bit from the
244 * Linux AHCI driver because we're storing both in AI_INFO. As in the
245 * Linux driver, the port map is the main driver for port scanning but
246 * we're also saving a maximum port number in AI_INFO to reduce the
247 * number of IORB queues to look at in trigger_engine(). This is done
248 * in ahci_scan_ports().
249 */
250 ports = (ai->cap & 0x1f) + 1;
251 for (i = 0; i < AHCI_MAX_PORTS; i++) {
252 if (ai->port_map & (1UL << i)) {
253 ports--;
254 }
255 }
256 if (ports < 0) {
257 /* more ports in port_map than in HOST_CAP & 0x1f */
258 ports = (ai->cap & 0x1f) + 1;
259 dprintf("implemented port map (0x%lx) contains more "
260 "ports than nr_ports (%d), using nr_ports\n",
261 ai->port_map, ports);
262 ai->port_map = (1UL << ports) - 1UL;
263 }
264
265 /* set maximum command slot number */
266 ai->cmd_max = (u16) ((ai->cap >> 8) & 0x1f);
267
268 return(0);
269}
270
271/******************************************************************************
272 * Restore BIOS configuration of AHCI adapter. This is needed after scanning
273 * for devices because we still need the BIOS until the initial boot sequence
274 * has completed.
275 */
276int ahci_restore_bios_config(AD_INFO *ai)
277{
278 ddprintf("restoring AHCI BIOS configuration\n");
279
280 /* restore saved BIOS configuration */
281 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
282 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
283 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
284 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
285
286 /* flush PCI MMIO delayed write buffers */
287 readl(ai->mmio + HOST_EM_CTL);
288
289 return(0);
290}
291
292/******************************************************************************
293 * Restore initial configuration (e.g. after an adapter reset). This relies
294 * on information saved by 'ahci_save_bios_config()'.
295 */
296int ahci_restore_initial_config(AD_INFO *ai)
297{
298 ddprintf("restoring initial configuration\n");
299
300 /* restore saved BIOS configuration */
301 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
302 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
303 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
304 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
305
306 /* flush PCI MMIO delayed write buffers */
307 readl(ai->mmio + HOST_EM_CTL);
308
309 /* (re-)enable AHCI mode */
310 ahci_enable_ahci(ai);
311
312 return(0);
313}
314
315/******************************************************************************
316 * Save port configuration. This is primarily used to save the BIOS port
317 * configuration (command list and FIS buffers and the IRQ mask).
318 *
319 * The port configuration returned by this function is dynamically allocated
320 * and automatically freed when calling ahci_restore_port_config().
321 */
322AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p)
323{
324 AHCI_PORT_CFG *pc;
325 u8 _far *port_mmio = port_base(ai, p);
326
327 if ((pc = malloc(sizeof(*pc))) == NULL) {
328 return(NULL);
329 }
330
331 pc->cmd_list = readl(port_mmio + PORT_LST_ADDR);
332 pc->cmd_list_h = readl(port_mmio + PORT_LST_ADDR_HI);
333 pc->fis_rx = readl(port_mmio + PORT_FIS_ADDR);
334 pc->fis_rx_h = readl(port_mmio + PORT_FIS_ADDR_HI);
335 pc->irq_mask = readl(port_mmio + PORT_IRQ_MASK);
336
337 return(pc);
338}
339
340/******************************************************************************
341 * Restore port configuration. This is primarily used to restore the BIOS port
342 * configuration (command list and FIS buffers and the IRQ mask).
343 *
344 * The port configuration automatically freed.
345 */
346void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc)
347{
348 u8 _far *port_mmio = port_base(ai, p);
349
350 writel(port_mmio + PORT_LST_ADDR, pc->cmd_list);
351 writel(port_mmio + PORT_LST_ADDR_HI, pc->cmd_list_h);
352 writel(port_mmio + PORT_FIS_ADDR, pc->fis_rx);
353 writel(port_mmio + PORT_FIS_ADDR_HI, pc->fis_rx_h);
354 writel(port_mmio + PORT_IRQ_MASK, pc->irq_mask);
355
356 readl(port_base(ai, p) + PORT_IRQ_MASK); /* flush */
357
358 free(pc);
359}
360
361/******************************************************************************
362 * Enable AHCI mode on this controller.
363 */
364int ahci_enable_ahci(AD_INFO *ai)
365{
366 u32 ctl = readl(ai->mmio + HOST_CTL);
367 int i;
368
369 if (ctl & HOST_AHCI_EN) {
370 /* AHCI mode already enabled */
371 return(0);
372 }
373
374 /* some controllers need AHCI_EN to be written multiple times */
375 for (i = 0; i < 5; i++) {
376 ctl |= HOST_AHCI_EN;
377 writel(ai->mmio + HOST_CTL, ctl);
378 ctl = readl(ai->mmio + HOST_CTL); /* flush && sanity check */
379 if (ctl & HOST_AHCI_EN) {
380 return(0);
381 }
382 mdelay(10);
383 }
384
385 /* couldn't enable AHCI mode */
386 dprintf("failed to enable AHCI mode on adapter #%d\n", ad_no(ai));
387 return(1);
388}
389
390/******************************************************************************
391 * Scan all ports for connected devices and fill in the corresponding device
392 * information.
393 *
394 * NOTES:
395 *
396 * - The adapter is temporarily configured for os2ahci but the original BIOS
397 * configuration will be restored when done. This happens only until we
398 * have received the IOCC_COMPLETE_INIT command.
399 *
400 * - Subsequent calls are currently not planned but may be required for
401 * suspend/resume handling, hot swap functionality, etc.
402 *
403 * - This function is expected to be called with the spinlock released but
404 * the corresponding adapter's busy flag set. It will aquire the spinlock
405 * temporarily to allocate/free memory for the ATA identify buffer.
406 */
407int ahci_scan_ports(AD_INFO *ai)
408{
409 AHCI_PORT_CFG *pc = NULL;
410 u16 *id_buf;
411 int rc;
412 int p;
413
414 spin_lock(drv_lock);
415 id_buf = malloc(ATA_ID_WORDS * sizeof(u16));
416 spin_unlock(drv_lock);
417 if (id_buf == NULL) {
418 return(-1);
419 }
420
421 if (ai->bios_config[0] == 0) {
422 /* first call */
423 ahci_save_bios_config(ai);
424 }
425
426 if (ahci_enable_ahci(ai)) {
427 goto exit_port_scan;
428 }
429
430 /* perform port scan */
431 dprintf("scanning ports on adapter #%d\n", ad_no(ai));
432 for (p = 0; p < AHCI_MAX_PORTS; p++) {
433 if (ai->port_map & (1UL << p)) {
434
435 if (!init_complete) {
436 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
437 goto exit_port_scan;
438 }
439 }
440
441 /* start/reset port; if no device is attached, this is expected to fail */
442 if (init_reset) {
443 ddprintf("init-resetting port #%d\n", p);
444 rc = ahci_reset_port(ai, p, 0);
445 } else {
446 ddprintf("(re)starting port #%d\n", p);
447 ahci_stop_port(ai, p);
448 rc = ahci_start_port(ai, p, 0);
449 }
450 if (rc) {
451 /* no device attached to this port */
452 ai->port_map &= ~(1UL << p);
453 goto restore_port_config;
454 }
455
456 /* this port has a device attached and is ready to accept commands */
457 ddprintf("port #%d seems to be attached to a device; probing...\n", p);
458 rc = ahci_exec_polled_cmd(ai, p, 0, 500, ATA_CMD_ID_ATA,
459 AP_VADDR, (void _far *) id_buf, 512,
460 AP_END);
461 if (rc != 0 || id_buf[ATA_ID_CONFIG] & (1U << 15)) {
462 /* this might be an ATAPI device; run IDENTIFY_PACKET_DEVICE */
463 rc = ahci_exec_polled_cmd(ai, p, 0, 500, ATA_CMD_ID_ATAPI,
464 AP_VADDR, (void _far *) id_buf, 512,
465 AP_END);
466 }
467
468 if (rc == 0) {
469 /* we have a valid IDENTIFY or IDENTIFY_PACKET response */
470 ddphex(id_buf, 512, "ATA_IDENTIFY(_PACKET) results:\n");
471 ahci_setup_device(ai, p, 0, id_buf);
472
473 } else {
474 /* no device attached to this port */
475 ai->port_map &= ~(1UL << p);
476 }
477
478 restore_port_config:
479 if (pc != NULL) {
480 ahci_restore_port_config(ai, p, pc);
481 }
482 }
483 }
484
485exit_port_scan:
486 if (!init_complete) {
487 ahci_restore_bios_config(ai);
488 }
489 spin_lock(drv_lock);
490 free(id_buf);
491 spin_unlock(drv_lock);
492 return(0);
493}
494
495/******************************************************************************
496 * Complete initialization of adapter. This includes restarting all active
497 * ports and initializing interrupt processing. This is called when receiving
498 * the IOCM_COMPLETE_INIT request.
499 */
500int ahci_complete_init(AD_INFO *ai)
501{
502 int rc;
503 int p;
504 int i;
505
506 dprintf("completing initialization of adapter #%d\n", ad_no(ai));
507
508 /* register IRQ handlers; each IRQ level is registered only once */
509 for (i = 0; i < irq_map_cnt; i++) {
510 if (irq_map[i] == ai->irq) {
511 /* we already have this IRQ registered */
512 break;
513 }
514 }
515
516 if (i >= irq_map_cnt) {
517 dprintf("registering interrupt #%d\n", ai->irq);
518
519 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 1) != 0) {
520 dprintf("failed to register shared interrupt\n");
521
522 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 0) != 0) {
523 dprintf("failed to register exclusive interrupt\n");
524 return(-1);
525 }
526 }
527 irq_map[irq_map_cnt++] = ai->irq;
528 }
529
530 /* enable AHCI mode */
531 if ((rc = ahci_enable_ahci(ai)) != 0) {
532 return(rc);
533 }
534
535 /* Start all ports. The main purpose is to set the command list and FIS
536 * receive area addresses properly and to enable port-level interrupts; we
537 * don't really care about the return status because we'll find out soon
538 * enough if a previously detected device has problems.
539 */
540 for (p = 0; p < AHCI_MAX_PORTS; p++) {
541 if (ai->port_map & (1UL << p)) {
542 dprintf("restarting port #%d\n", p);
543 ahci_stop_port(ai, p);
544 ahci_start_port(ai, p, 1);
545 }
546 }
547
548 /* clear pending interrupt status */
549 writel(ai->mmio + HOST_IRQ_STAT, readl(ai->mmio + HOST_IRQ_STAT));
550 readl(ai->mmio + HOST_IRQ_STAT); /* flush */
551
552 /* enable adapter-level interrupts */
553 writel(ai->mmio + HOST_CTL, HOST_IRQ_EN);
554 readl(ai->mmio + HOST_CTL); /* flush */
555
556 /* enable interrupts on PCI-level (PCI 2.3 added a feature to disable ints) */
557 pci_enable_int(ai->bus, ai->dev_func);
558
559 return(0);
560}
561
562/******************************************************************************
563 * Reset specified port. This function is typically called during adapter
564 * initialization and first gets the port into a defined status, then resets
565 * the port by sending a COMRESET signal.
566 *
567 * This function is also the location of the link speed initialization (link
568 * needs to be restablished after changing link speed, anyway).
569 *
570 * NOTE: This function uses a busy loop to wait for DMA engines to stop and
571 * the COMRESET to complete. It should only be called at task time
572 * during initialization or in a context hook.
573 */
574int ahci_reset_port(AD_INFO *ai, int p, int ei)
575{
576 u8 _far *port_mmio = port_base(ai, p);
577 u32 tmp;
578 int timeout = 5000;
579
580 dprintf("resetting port %d.%d\n", ad_no(ai), p);
581
582 /* stop port engines (we don't care whether there is an error doing so) */
583 ahci_stop_port(ai, p);
584
585 /* clear SError */
586 tmp = readl(port_mmio + PORT_SCR_ERR);
587 ddprintf(" PORT_SCR_ERR = 0x%lx\n", tmp);
588 writel(port_mmio + PORT_SCR_ERR, tmp);
589
590 /* clear pending port IRQs */
591 tmp = readl(port_mmio + PORT_IRQ_STAT);
592 ddprintf("PORT_IRQ_STAT was 0x%lx\n", tmp);
593 if (tmp) {
594 writel(port_mmio + PORT_IRQ_STAT, tmp);
595 }
596 ddprintf(" PORT_IRQ_STAT = 0x%lx\n", tmp);
597 ddprintf(" PORT_IRQ_MASK = 0x%lx\n", readl(port_mmio + PORT_IRQ_MASK));
598 ddprintf(" HOST_IRQ_STAT = 0x%lx\n", readl(ai->mmio + HOST_IRQ_STAT));
599 writel(ai->mmio + HOST_IRQ_STAT, 1UL << p);
600
601 /* set link speed */
602 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x000000f0UL;
603 writel(port_mmio + PORT_SCR_CTL, tmp | (link_speed[ad_no(ai)][p] << 4));
604
605 /* issue COMRESET on the port */
606 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x0000000fUL;
607 writel(port_mmio + PORT_SCR_CTL, tmp | 1);
608 readl(port_mmio + PORT_SCR_CTL); /* flush */
609
610 /* spec says "leave reset bit on for at least 1ms"; make it 2ms */
611 mdelay(2);
612
613 writel(port_mmio + PORT_SCR_CTL, tmp);
614 readl(port_mmio + PORT_SCR_CTL); /* flush */
615
616 /* wait for communication to be re-established after port reset */
617 while (((tmp = readl(port_mmio + PORT_SCR_STAT) & 3)) != 3) {
618 mdelay(10);
619 timeout -= 10;
620 if (timeout <= 0) {
621 dprintf("no device present after resetting port #%d "
622 "(PORT_SCR_STAT = 0x%lx)\n", p, tmp);
623 return(-1);
624 }
625 }
626
627 /* clear SError again (recommended by AHCI spec) */
628 tmp = readl(port_mmio + PORT_SCR_ERR);
629 writel(port_mmio + PORT_SCR_ERR, tmp);
630
631 /* start port so we can receive the COMRESET FIS */
632 ahci_start_port(ai, p, ei);
633
634 /* wait for device to be ready ((PxTFD & (BSY | DRQ | ERR)) == 0) */
635 while (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
636 mdelay(10);
637 timeout -= 10;
638 if (timeout <= 0) {
639 dprintf("device not ready on port #%d "
640 "(PORT_TFDATA = 0x%lx)\n", p, tmp);
641 ahci_stop_port(ai, p);
642 return(-1);
643 }
644 }
645 ddprintf(" PORT_TFDATA = 0x%lx\n", readl(port_mmio + PORT_TFDATA));
646
647 return(0);
648}
649
650/******************************************************************************
651 * Start specified port.
652 */
653int ahci_start_port(AD_INFO *ai, int p, int ei)
654{
655 u8 _far *port_mmio = port_base(ai, p);
656 u32 status;
657
658 /* check whether device presence is detected and link established */
659 status = readl(port_mmio + PORT_SCR_STAT);
660 ddprintf(" PORT_SCR_STAT = 0x%lx\n", status);
661 if ((status & 0xf) != 3) {
662 return(-1);
663 }
664
665 /* clear SError, if any */
666 status = readl(port_mmio + PORT_SCR_ERR);
667 ddprintf(" PORT_SCR_ERR = 0x%lx\n", status);
668 writel(port_mmio + PORT_SCR_ERR, status);
669
670 /* enable FIS reception */
671 ahci_start_fis_rx(ai, p);
672
673 /* enable command engine */
674 ahci_start_engine(ai, p);
675
676 if (ei) {
677 /* clear any pending interrupts on this port */
678 if ((status = readl(port_mmio + PORT_IRQ_STAT)) != 0) {
679 writel(port_mmio + PORT_IRQ_STAT, status);
680 }
681
682 /* enable port interrupts */
683 writel(port_mmio + PORT_IRQ_MASK, PORT_IRQ_TF_ERR |
684 PORT_IRQ_HBUS_ERR |
685 PORT_IRQ_HBUS_DATA_ERR |
686 PORT_IRQ_IF_ERR |
687 PORT_IRQ_OVERFLOW |
688 PORT_IRQ_BAD_PMP |
689 PORT_IRQ_UNK_FIS |
690 PORT_IRQ_SDB_FIS |
691 PORT_IRQ_D2H_REG_FIS);
692 } else {
693 writel(port_mmio + PORT_IRQ_MASK, 0);
694 }
695 readl(port_mmio + PORT_IRQ_MASK); /* flush */
696
697 return(0);
698}
699
700/******************************************************************************
701 * Start port FIS reception. Copied from Linux AHCI driver and adopted to
702 * OS2AHCI.
703 */
704void ahci_start_fis_rx(AD_INFO *ai, int p)
705{
706 u8 _far *port_mmio = port_base(ai, p);
707 u32 port_dma = port_dma_base_phys(ai, p);
708 u32 tmp;
709
710 /* set comand header and FIS address registers */
711 writel(port_mmio + PORT_LST_ADDR, port_dma + offsetof(AHCI_PORT_DMA, cmd_hdr));
712 writel(port_mmio + PORT_LST_ADDR_HI, 0);
713 writel(port_mmio + PORT_FIS_ADDR, port_dma + offsetof(AHCI_PORT_DMA, rx_fis));
714 writel(port_mmio + PORT_FIS_ADDR_HI, 0);
715
716 /* enable FIS reception */
717 tmp = readl(port_mmio + PORT_CMD);
718 tmp |= PORT_CMD_FIS_RX;
719 writel(port_mmio + PORT_CMD, tmp);
720
721 /* flush */
722 readl(port_mmio + PORT_CMD);
723}
724
725/******************************************************************************
726 * Start port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
727 */
728void ahci_start_engine(AD_INFO *ai, int p)
729{
730 u8 _far *port_mmio = port_base(ai, p);
731 u32 tmp;
732
733 /* start DMA */
734 tmp = readl(port_mmio + PORT_CMD);
735 tmp |= PORT_CMD_START;
736 writel(port_mmio + PORT_CMD, tmp);
737 readl(port_mmio + PORT_CMD); /* flush */
738}
739
740/******************************************************************************
741 * Stop specified port
742 */
743int ahci_stop_port(AD_INFO *ai, int p)
744{
745 u8 _far *port_mmio = port_base(ai, p);
746 int rc;
747
748 /* disable FIS reception */
749 if ((rc = ahci_stop_fis_rx(ai, p)) != 0) {
750 dprintf("error: failed to stop FIS receive (%d)\n", rc);
751 return(rc);
752 }
753
754 /* disable command engine */
755 if ((rc = ahci_stop_engine(ai, p)) != 0) {
756 dprintf("error: failed to stop port HW engine (%d)\n", rc);
757 return(rc);
758 }
759
760 /* reset PxSACT register (tagged command queues, not reset by COMRESET) */
761 writel(port_mmio + PORT_SCR_ACT, 0);
762 readl(port_mmio + PORT_SCR_ACT); /* flush */
763
764 return(0);
765}
766
767/******************************************************************************
768 * Stop port FIS reception. Copied from Linux AHCI driver and adopted to
769 * OS2AHCI.
770 *
771 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
772 * should only be called at task time during initialization or in a
773 * context hook (e.g. when resetting a port).
774 */
775int ahci_stop_fis_rx(AD_INFO *ai, int p)
776{
777 u8 _far *port_mmio = port_base(ai, p);
778 int timeout = 1000;
779 u32 tmp;
780
781 /* disable FIS reception */
782 tmp = readl(port_mmio + PORT_CMD);
783 tmp &= ~PORT_CMD_FIS_RX;
784 writel(port_mmio + PORT_CMD, tmp);
785
786 /* wait for completion, spec says 500ms, give it 1000 */
787 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_FIS_ON)) {
788 mdelay(10);
789 timeout -= 10;
790 }
791
792 return((timeout <= 0) ? -1 : 0);
793}
794
795/******************************************************************************
796 * Stop port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
797 *
798 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
799 * should only be called at task time during initialization or in a
800 * context hook (e.g. when resetting a port).
801 */
802int ahci_stop_engine(AD_INFO *ai, int p)
803{
804 u8 _far *port_mmio = port_base(ai, p);
805 int timeout = 500;
806 u32 tmp;
807
808 tmp = readl(port_mmio + PORT_CMD);
809
810 /* check if the port is already stopped */
811 if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) {
812 return 0;
813 }
814
815 /* set port to idle */
816 tmp &= ~PORT_CMD_START;
817 writel(port_mmio + PORT_CMD, tmp);
818
819 /* wait for engine to stop. This could be as long as 500 msec */
820 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_LIST_ON)) {
821 mdelay(10);
822 timeout -= 10;
823 }
824
825 return((timeout <= 0) ? -1 : 0);
826}
827
828/******************************************************************************
829 * Execute AHCI command for given IORB. This includes all steps typically
830 * required by any of the ahci_*() IORB processing functions.
831 *
832 * NOTE: In order to prevent race conditions with port restart and reset
833 * handlers, we either need to keep the spinlock during the whole
834 * operation or set the adapter's busy flag. Since the expectation
835 * is that command preparation will be quick (it certainly doesn't
836 * involve delays), we're going with the spinlock for the time being.
837 */
838void ahci_exec_iorb(IORBH _far *iorb, int ncq_capable,
839 int (*func)(IORBH _far *, int))
840{
841 volatile u32 *cmds;
842 ADD_WORKSPACE _far *aws = add_workspace(iorb);
843 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
844 P_INFO *port = ai->ports + iorb_unit_port(iorb);
845 ULONG timeout = (iorb->Timeout > 0) ? iorb->Timeout : DEFAULT_TIMEOUT;
846 u8 _far *port_mmio = port_base(ai, iorb_unit_port(iorb));
847 u16 cmd_max = ai->cmd_max;
848 int i;
849
850 /* Enable AHCI mode; apparently, the AHCI mode may end up becoming
851 * disabled, either during the boot sequence (by the BIOS) or by
852 * something else. The Linux AHCI drivers have this call in the
853 * command processing chain, and apparently for a good reason because
854 * without this, commands won't be executed.
855 */
856 ahci_enable_ahci(ai);
857
858 /* determine whether this will be an NCQ request */
859 aws->is_ncq = 0;
860 if (ncq_capable && port->devs[iorb_unit_device(iorb)].ncq_max > 1 &&
861 (ai->cap & HOST_CAP_NCQ) && !aws->no_ncq && init_complete) {
862
863 /* We can make this an NCQ request; limit command slots to the maximum
864 * NCQ tag number reported by the device - 1. Why "minus one"? I seem to
865 * recall an issue related to using all 32 tag numbers but can't quite
866 * pinpoint it right now. One less won't make much of a difference...
867 */
868 aws->is_ncq = 1;
869 if ((cmd_max = port->devs[iorb_unit_device(iorb)].ncq_max - 1) > ai->cmd_max) {
870 cmd_max = ai->cmd_max;
871 }
872 ddprintf("NCQ command; cmd_max = %d->%d\n", (u16) ai->cmd_max, cmd_max);
873 }
874
875 /* make sure adapter is available */
876 spin_lock(drv_lock);
877 if (!ai->busy) {
878
879 if (!init_complete) {
880 ai->busy = 1;
881 spin_unlock(drv_lock);
882 ahci_exec_polled_iorb(iorb, func, timeout);
883 ai->busy = 0;
884 return;
885 }
886
887 /* make sure we don't mix NCQ and regular commands */
888 if (aws->is_ncq && port->reg_cmds == 0 || !aws->is_ncq && port->ncq_cmds == 0) {
889
890 /* Find next available command slot. We use a simple round-robin
891 * algorithm for this to prevent commands with higher slot indexes
892 * from stalling when new commands are coming in frequently.
893 */
894 cmds = (aws->is_ncq) ? &port->ncq_cmds : &port->reg_cmds;
895 for (i = 0; i <= cmd_max; i++) {
896 if (++(port->cmd_slot) > cmd_max) {
897 port->cmd_slot = 0;
898 }
899 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
900 break;
901 }
902 }
903
904 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
905 /* prepare command */
906 if (func(iorb, port->cmd_slot)) {
907 /* Command preparation failed, or no HW command required; IORB
908 * will already have the error code if there was an error.
909 */
910 spin_unlock(drv_lock);
911 iorb_done(iorb);
912 return;
913 }
914
915 /* start timer for this IORB */
916 ADD_StartTimerMS(&aws->timer, timeout, (PFN) timeout_callback, iorb, 0);
917
918 /* update IORB */
919 aws->queued_hw = 1;
920 aws->cmd_slot = port->cmd_slot;
921
922 /* issue command to hardware */
923 ddprintf("issuing command on slot %d\n", port->cmd_slot);
924 *cmds |= (1UL << port->cmd_slot);
925 if (aws->is_ncq) {
926 writel(port_mmio + PORT_SCR_ACT, (1UL << port->cmd_slot));
927 readl(port_mmio + PORT_SCR_ACT); /* flush */
928 }
929 writel(port_mmio + PORT_CMD_ISSUE, (1UL << port->cmd_slot));
930 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
931
932 spin_unlock(drv_lock);
933 return;
934 }
935 }
936 }
937
938 /* requeue this IORB; it will be picked up again in trigger_engine() */
939 aws->processing = 0;
940 spin_unlock(drv_lock);
941}
942
943/******************************************************************************
944 * Execute polled IORB command. This function is called by ahci_exec_iorb()
945 * when the initialization has not yet completed. The reasons for polling until
946 * initialization has completed are:
947 *
948 * - We need to restore the BIOS configuration after we're done with this
949 * command because someone might still call int 13h routines; sending
950 * asynchronous commands and waiting for interrupts to indicate completion
951 * won't work in such a scenario.
952 * - Our context hooks won't work while the device managers are initializing
953 * (they can't yield at init time).
954 * - The device managers typically poll for command completion during
955 * initialization so it won't make much of a difference, anyway.
956 *
957 * NOTE: This function must be called with the adapter-level busy flag set but
958 * without the driver-level spinlock held.
959 */
960void ahci_exec_polled_iorb(IORBH _far *iorb, int (*func)(IORBH _far *, int),
961 ULONG timeout)
962{
963 AHCI_PORT_CFG *pc = NULL;
964 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
965 int p = iorb_unit_port(iorb);
966 u8 _far *port_mmio = port_base(ai, p);
967
968 /* enable AHCI mode */
969 if (ahci_enable_ahci(ai) != 0) {
970 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
971 goto restore_bios_config;
972 }
973
974 /* check whether command slot 0 is available */
975 if ((readl(port_mmio + PORT_CMD_ISSUE) & 1) != 0) {
976 iorb_seterr(iorb, IOERR_DEVICE_BUSY);
977 goto restore_bios_config;
978 }
979
980 /* save port configuration */
981 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
982 iorb_seterr(iorb, IOERR_CMD_SW_RESOURCE);
983 goto restore_bios_config;
984 }
985
986 /* restart port (includes the necessary port configuration) */
987 if (ahci_stop_port(ai, p) || ahci_start_port(ai, p, 0)) {
988 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
989 goto restore_bios_config;
990 }
991
992 /* prepare command */
993 if (func(iorb, 0) == 0) {
994 /* successfully prepared cmd; issue cmd and wait for completion */
995 ddprintf("executing polled cmd...");
996 writel(port_mmio + PORT_CMD_ISSUE, 1);
997 timeout /= 10;
998 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
999 mdelay(10);
1000 timeout--;
1001 }
1002 ddprintf(" done (time left = %ld)\n", timeout * 10);
1003
1004 if (timeout == 0) {
1005 dprintf("timeout for IORB %Fp\n", iorb);
1006 iorb_seterr(iorb, IOERR_ADAPTER_TIMEOUT);
1007
1008 } else if (readl(port_mmio + PORT_SCR_ERR) != 0 ||
1009 readl(port_mmio + PORT_TFDATA) & 0x89) {
1010 dprintf("polled cmd error for IORB %Fp\n", iorb);
1011 iorb_seterr(iorb, IOERR_DEVICE_NONSPECIFIC);
1012 ahci_reset_port(ai, iorb_unit_port(iorb), 0);
1013
1014 } else {
1015 /* successfully executed command */
1016 if (add_workspace(iorb)->ppfunc != NULL) {
1017 add_workspace(iorb)->ppfunc(iorb);
1018 } else {
1019 add_workspace(iorb)->complete = 1;
1020 }
1021 }
1022 }
1023
1024restore_bios_config:
1025 /* restore BIOS configuration */
1026 if (pc != NULL) {
1027 ahci_restore_port_config(ai, p, pc);
1028 }
1029 ahci_restore_bios_config(ai);
1030
1031 if (add_workspace(iorb)->complete | (iorb->Status | IORB_ERROR)) {
1032 aws_free(add_workspace(iorb));
1033 iorb_done(iorb);
1034 }
1035 return;
1036}
1037
1038/******************************************************************************
1039 * set device into IDLE mode (spin down); this was used during
1040 * debugging/testing and is still there since it does not hurt...
1041 * If 'idle' is != 0, the idle timeout is set to 5 seconds, otherwise it
1042 * is turned off.
1043 */
1044int ahci_set_dev_idle(AD_INFO *ai, int p, int idle)
1045{
1046 ddprintf("sending IDLE=%d command to port %d\n", idle, p);
1047 return ahci_exec_polled_cmd(ai, p, 0, 500, ATA_CMD_IDLE, AP_COUNT,
1048 idle ? 1 : 0, AP_END);
1049}
1050
1051/******************************************************************************
1052 * Execute polled ATA/ATAPI command. This function will block until the command
1053 * has completed or the timeout has expired, thus it should only be used during
1054 * initialization. Furthermore, it will always use command slot zero.
1055 *
1056 * The difference to ahci_exec_polled_iorb() is that this function executes
1057 * arbitrary ATA/ATAPI commands outside the context of an IORB. It's typically
1058 * used when scanning for devices during initialization.
1059 */
1060int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...)
1061{
1062 va_list va;
1063 u8 _far *port_mmio = port_base(ai, p);
1064 u32 tmp;
1065 int rc;
1066
1067 /* verify that command slot 0 is idle */
1068 if (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
1069 ddprintf("port %d slot 0 is not idle; not executing polled cmd\n", p);
1070 return(-1);
1071 }
1072
1073 /* fill in command slot 0 */
1074 va_start(va, cmd);
1075 if ((rc = v_ata_cmd(ai, p, d, 0, cmd, va)) != 0) {
1076 return(rc);
1077 }
1078
1079 /* start command execution for slot 0 */
1080 ddprintf("executing polled cmd...");
1081 writel(port_mmio + PORT_CMD_ISSUE, 1);
1082
1083 /* wait until command has completed */
1084 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
1085 mdelay(10);
1086 timeout -= 10;
1087 }
1088 ddprintf(" done (time left = %d)\n", timeout);
1089
1090 /* check error condition */
1091 if ((tmp = readl(port_mmio + PORT_SCR_ERR)) != 0) {
1092 dprintf("SERR = 0x%08lx\n", tmp);
1093 timeout = 0;
1094 }
1095 if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
1096 dprintf("TFDATA = 0x%08lx\n", tmp);
1097 timeout = 0;
1098 }
1099
1100 if (timeout <= 0) {
1101 ahci_reset_port(ai, p, 0);
1102 return(-1);
1103 }
1104 return(0);
1105}
1106
1107/******************************************************************************
1108 * AHCI top-level hardware interrupt handler. This handler finds the adapters
1109 * and ports which have issued the interrupt and calls the corresponding
1110 * port interrupt handler.
1111 *
1112 * On entry, OS/2 will have processor interrupts enabled because we're using
1113 * shared IRQs but we won't be preempted by another interrupt on the same
1114 * IRQ level until we indicated EOI. We'll keep it this way, only requesting
1115 * the driver-level spinlock when actually changing the driver state (IORB
1116 * queues, ...)
1117 */
1118int ahci_intr(u16 irq)
1119{
1120 u32 irq_stat;
1121 int handled = 0;
1122 int a;
1123 int p;
1124
1125 /* find adapter(s) with pending interrupts */
1126 for (a = 0; a < ad_info_cnt; a++) {
1127 AD_INFO *ai = ad_infos + a;
1128
1129 if (ai->irq == irq && (irq_stat = readl(ai->mmio + HOST_IRQ_STAT)) != 0) {
1130 /* this adapter has interrupts pending */
1131 u32 irq_masked = irq_stat & ai->port_map;
1132
1133 for (p = 0; p <= ai->port_max; p++) {
1134 if (irq_masked & (1UL << p)) {
1135 ahci_port_intr(ai, p);
1136 }
1137 }
1138
1139 /* clear interrupt condition on the adapter */
1140 writel(ai->mmio + HOST_IRQ_STAT, irq_stat);
1141 readl(ai->mmio + HOST_IRQ_STAT); /* flush */
1142 handled = 1;
1143 }
1144 }
1145
1146 if (handled) {
1147 /* trigger state machine to process next IORBs, if any */
1148 spin_lock(drv_lock);
1149 trigger_engine();
1150 spin_unlock(drv_lock);
1151
1152 /* complete the interrupt */
1153 DevHelp_EOI(irq);
1154 return(0);
1155 } else {
1156 return(1);
1157 }
1158}
1159
1160/******************************************************************************
1161 * AHCI port-level interrupt handler. As described above, processor interrupts
1162 * are enabled on entry thus we have to protect shared resources with a
1163 * spinlock.
1164 */
1165void ahci_port_intr(AD_INFO *ai, int p)
1166{
1167 IORB_QUEUE done_queue;
1168 IORBH _far *iorb;
1169 IORBH _far *next = NULL;
1170 u8 _far *port_mmio = port_base(ai, p);
1171 u32 irq_stat;
1172 u32 active_cmds;
1173 u32 done_mask;
1174
1175 ddprintf("port interrupt for adapter #%d, port #%d\n", ad_no(ai), p);
1176 memset(&done_queue, 0x00, sizeof(done_queue));
1177
1178 /* get interrupt status and clear it right away */
1179 irq_stat = readl(port_mmio + PORT_IRQ_STAT);
1180 writel(port_mmio + PORT_IRQ_STAT, irq_stat);
1181 readl(port_mmio + PORT_IRQ_STAT); /* flush */
1182
1183 if (irq_stat & PORT_IRQ_ERROR) {
1184 /* this is an error interrupt */
1185 ahci_error_intr(ai, p, irq_stat);
1186 return;
1187 }
1188
1189 spin_lock(drv_lock);
1190
1191 /* Find out which command slots have completed. Since error recovery for
1192 * NCQ commands interfers with non-NCQ commands, the upper layers will
1193 * make sure there's never a mixture of NCQ and non-NCQ commands active
1194 * on any port at any given time. This makes it easier to find out which
1195 * commands have completed, too.
1196 */
1197 if (ai->ports[p].ncq_cmds != 0) {
1198 active_cmds = readl(port_mmio + PORT_SCR_ACT);
1199 done_mask = ai->ports[p].ncq_cmds ^ active_cmds;
1200 ddprintf("[ncq_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1201 active_cmds, done_mask);
1202 } else {
1203 active_cmds = readl(port_mmio + PORT_CMD_ISSUE);
1204 done_mask = ai->ports[p].reg_cmds ^ active_cmds;
1205 ddprintf("[reg_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1206 active_cmds, done_mask);
1207 }
1208
1209 /* Find the IORBs related to the completed commands and complete them.
1210 *
1211 * NOTES: The spinlock must not be released while in this loop to prevent
1212 * race conditions with timeout handlers or other threads in SMP
1213 * systems.
1214 *
1215 * Since we hold the spinlock when IORBs complete, we can't call the
1216 * IORB notification routine right away because this routine might
1217 * schedule another IORB which could cause a deadlock. Thus, we'll
1218 * add all IORBs to be completed to a temporary queue which will be
1219 * processed after releasing the spinlock.
1220 */
1221 for (iorb = ai->ports[p].iorb_queue.root; iorb != NULL; iorb = next) {
1222 ADD_WORKSPACE _far *aws = (ADD_WORKSPACE _far *) &iorb->ADDWorkSpace;
1223 next = iorb->pNxtIORB;
1224 if (aws->queued_hw && (done_mask & (1UL << aws->cmd_slot))) {
1225 /* this command has completed */
1226 if (aws->ppfunc != NULL) {
1227 aws->ppfunc(iorb);
1228 } else {
1229 aws->complete = 1;
1230 }
1231
1232 if (aws->complete) {
1233 /* this IORB is complete */
1234 aws_free(aws);
1235
1236 /* move IORB to our temporary done queue */
1237 iorb_queue_del(&ai->ports[p].iorb_queue, iorb);
1238 iorb_queue_add(&done_queue, iorb);
1239 }
1240
1241 /* clear corresponding bit in issued command bitmaps */
1242 ai->ports[p].ncq_cmds &= ~(1UL << aws->cmd_slot);
1243 ai->ports[p].reg_cmds &= ~(1UL << aws->cmd_slot);
1244 }
1245 }
1246
1247 spin_unlock(drv_lock);
1248
1249 /* call notification routines for all IORBs in the done queue */
1250 for (iorb = done_queue.root; iorb != NULL; iorb = next) {
1251 next = iorb->pNxtIORB;
1252 iorb->Status = IORB_DONE;
1253 if (iorb->RequestControl & IORB_ASYNC_POST) {
1254 iorb->NotifyAddress(iorb);
1255 }
1256 }
1257}
1258
1259/******************************************************************************
1260 * AHCI error interrupt handler. Errors include interface errors and device
1261 * errors (usually triggered by the error bit in the AHCI task file register).
1262 *
1263 * Since this involves long-running operations such as restarting or even
1264 * resetting a port, this function is invoked at task time via a context
1265 * hook.
1266 *
1267 * NOTE: AHCI controllers stop all processing when encountering an error
1268 * condition in order to give the driver time to find out what exactly
1269 * went wrong. This means no new commands will be processed until we
1270 * clear the error register and restore the "commands issued" register.
1271 */
1272void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat)
1273{
1274 int reset_port = 0;
1275
1276 /* Handle adapter and interface errors. Those typically require a port
1277 * reset, or worse.
1278 */
1279 if (irq_stat & PORT_IRQ_UNK_FIS) {
1280 u32 _far *unk = (u32 _far *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK);
1281 dprintf("warning: unknown FIS %08lx %08lx %08lx %08lx\n",
1282 unk[0], unk[1], unk[2], unk[3]);
1283 reset_port = 1;
1284 }
1285 if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) {
1286 dprintf("warning: host bus [data] error for port #%d\n", p);
1287 reset_port = 1;
1288 }
1289 if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR)) {
1290 dprintf("warning: interface fatal error for port #%d\n", p);
1291 reset_port = 1;
1292 }
1293 if (reset_port) {
1294 /* need to reset the port; leave this to the reset context hook */
1295 ports_to_reset[ad_no(ai)] |= 1UL << p;
1296 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1297
1298 /* no point analyzing device errors after a reset... */
1299 return;
1300 }
1301
1302 /* Handle device-specific errors. Those errors typically involve restarting
1303 * the corresponding port to resume operations which can take some time,
1304 * thus we need to offload this functionality to the restart context hook.
1305 */
1306 if (irq_stat & PORT_IRQ_TF_ERR) {
1307 ports_to_restart[ad_no(ai)] |= 1UL << p;
1308 DevHelp_ArmCtxHook(0, restart_ctxhook_h);
1309 }
1310}
1311
1312/******************************************************************************
1313 * Get device or media geometry. Device and media geometry are expected to be
1314 * the same for non-removable devices.
1315 */
1316void ahci_get_geometry(IORBH _far *iorb)
1317{
1318 dprintf("ahci_get_geometry(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
1319 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1320
1321 ahci_exec_iorb(iorb, 0, cmd_func(iorb, get_geometry));
1322}
1323
1324/******************************************************************************
1325 * Test whether unit is ready.
1326 */
1327void ahci_unit_ready(IORBH _far *iorb)
1328{
1329 dprintf("ahci_unit_ready(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
1330 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1331
1332 ahci_exec_iorb(iorb, 0, cmd_func(iorb, unit_ready));
1333}
1334
1335/******************************************************************************
1336 * Read sectors from AHCI device.
1337 */
1338void ahci_read(IORBH _far *iorb)
1339{
1340 dprintf("ahci_read(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1341 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1342 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1343 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1344
1345 ahci_exec_iorb(iorb, 1, cmd_func(iorb, read));
1346}
1347
1348/******************************************************************************
1349 * Verify readability of sectors on AHCI device.
1350 */
1351void ahci_verify(IORBH _far *iorb)
1352{
1353 dprintf("ahci_verify(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1354 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1355 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1356 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1357
1358 ahci_exec_iorb(iorb, 0, cmd_func(iorb, verify));
1359}
1360
1361/******************************************************************************
1362 * Write sectors to AHCI device.
1363 */
1364void ahci_write(IORBH _far *iorb)
1365{
1366 dprintf("ahci_write(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1367 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1368 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1369 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1370
1371 ahci_exec_iorb(iorb, 1, cmd_func(iorb, write));
1372}
1373
1374/******************************************************************************
1375 * Execute SCSI (ATAPI) command.
1376 */
1377void ahci_execute_cdb(IORBH _far *iorb)
1378{
1379 int a = iorb_unit_adapter(iorb);
1380 int p = iorb_unit_port(iorb);
1381 int d = iorb_unit_device(iorb);
1382
1383 dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
1384 ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
1385 "ahci_execute_cdb(%d.%d.%d)", a, p, d);
1386
1387 if (ad_infos[a].ports[p].devs[d].atapi) {
1388 ahci_exec_iorb(iorb, 0, atapi_execute_cdb);
1389 } else {
1390 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1391 iorb_done(iorb);
1392 }
1393}
1394
1395/******************************************************************************
1396 * Execute ATA command.
1397 */
1398void ahci_execute_ata(IORBH _far *iorb)
1399{
1400 int a = iorb_unit_adapter(iorb);
1401 int p = iorb_unit_port(iorb);
1402 int d = iorb_unit_device(iorb);
1403
1404 dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
1405 ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
1406 "ahci_execute_cdb(%d.%d.%d)", a, p, d);
1407
1408 if (ad_infos[a].ports[p].devs[d].atapi) {
1409 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1410 iorb_done(iorb);
1411 } else {
1412 ahci_exec_iorb(iorb, 0, ata_execute_ata);
1413 }
1414}
1415
1416/******************************************************************************
1417 * Set up device attached to the specified port based on ATA_IDENTFY_DEVICE or
1418 * ATA_IDENTFY_PACKET_DEVICE data.
1419 *
1420 * NOTE: Port multipliers are not supported, yet, thus the device number is
1421 * expected to be 0 for the time being.
1422 */
1423static void ahci_setup_device(AD_INFO *ai, int p, int d, u16 *id_buf)
1424{
1425 DEVICESTRUCT ds;
1426 ADJUNCT adj;
1427 HDEVICE dh;
1428 char dev_name[RM_MAX_PREFIX_LEN+ATA_ID_PROD_LEN+1];
1429 static u8 total_dev_cnt;
1430
1431 if (ai->port_max < p) {
1432 ai->port_max = p;
1433 }
1434 if (ai->ports[p].dev_max < d) {
1435 ai->ports[p].dev_max = d;
1436 }
1437 memset(ai->ports[p].devs + d, 0x00, sizeof(*ai->ports[p].devs));
1438
1439 /* set generic device information (assuming an ATA disk device for now) */
1440 ai->ports[p].devs[d].present = 1;
1441 ai->ports[p].devs[d].removable = (id_buf[ATA_ID_CONFIG] & 0x0080U) != 0;
1442 ai->ports[p].devs[d].dev_type = UIB_TYPE_DISK;
1443
1444 if (id_buf[ATA_ID_CONFIG] & 0x8000U) {
1445 /* this is an ATAPI device; augment device information */
1446 ai->ports[p].devs[d].atapi = 1;
1447 ai->ports[p].devs[d].atapi_16 = (id_buf[ATA_ID_CONFIG] & 0x0001U) != 0;
1448 ai->ports[p].devs[d].dev_type = (id_buf[ATA_ID_CONFIG] & 0x1f00U) >> 8;
1449
1450 } else {
1451 /* complete ATA-specific device information */
1452 if (disable_ncq[ad_no(ai)][p]) {
1453 /* MT: set ncq_max to 1 if NCQ is disabled for this port */
1454 ai->ports[p].devs[d].ncq_max = 1;
1455 dprintf("NCQ off for a:%d p:%d\n", (int) ad_no(ai), p);
1456 } else {
1457 ai->ports[p].devs[d].ncq_max = id_buf[ATA_ID_QUEUE_DEPTH] & 0x001fU;
1458 dprintf("NCQ max=%d for a:%d p:%d\n", ai->ports[p].devs[d].ncq_max, (int) ad_no(ai), p);
1459 }
1460
1461 if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x0400U) {
1462 ai->ports[p].devs[d].lba48 = 1;
1463 }
1464 }
1465
1466 dprintf("found device %d.%d.%d: removable = %d, dev_type = %d, atapi = %d\n",
1467 ad_no(ai), p, d,
1468 ai->ports[p].devs[d].removable,
1469 ai->ports[p].devs[d].dev_type,
1470 ai->ports[p].devs[d].atapi);
1471
1472 /* add device to resource manager; we don't really care about errors here */
1473 memset(&ds, 0x00, sizeof(ds));
1474 memset(&adj, 0x00, sizeof(adj));
1475
1476 adj.pNextAdj = NULL;
1477 adj.AdjLength = sizeof(adj);
1478 adj.AdjType = ADJ_ADD_UNIT;
1479 adj.Add_Unit.ADDHandle = rm_drvh;
1480 adj.Add_Unit.UnitHandle = (USHORT) total_dev_cnt;
1481
1482 /* create Resource Manager device key string;
1483 * we distinguish only HDs and CD drives for now
1484 */
1485 if (ai->ports[p].devs[d].removable) {
1486 sprintf(dev_name, RM_CD_PREFIX "%s", p, d, ata_dev_name(id_buf));
1487 } else {
1488 sprintf(dev_name, RM_HD_PREFIX "%s", p, d, ata_dev_name(id_buf));
1489 }
1490
1491 ds.DevDescriptName = dev_name;
1492 ds.DevFlags = (ai->ports[p].devs[d].removable) ? DS_REMOVEABLE_MEDIA
1493 : DS_FIXED_LOGICALNAME;
1494 ds.DevType = ai->ports[p].devs[d].dev_type;
1495 ds.pAdjunctList = &adj;
1496
1497 RMCreateDevice(rm_drvh, &dh, &ds, ai->rm_adh, NULL);
1498
1499 total_dev_cnt++;
1500
1501 /* try to detect virtualbox environment to enable a hack for IRQ routing */
1502 if (ai == ad_infos && p == 7 &&
1503 ai->pci->vendor == 0x8086 && ai->pci->device == 0x2829 &&
1504 !memcmp(ds.DevDescriptName, "VBOX HARDDISK", 13)) {
1505 /* running inside virtualbox */
1506 pci_hack_virtualbox();
1507 }
1508}
1509
1510/******************************************************************************
1511 * Timeout handler for I/O commands. Since timeout handling can involve
1512 * lengthy operations like port resets, the main code is located in a
1513 * separate function which is invoked via a context hook.
1514 */
1515static void _cdecl _far timeout_callback(ULONG timer_handle, ULONG p1,
1516 ULONG p2)
1517{
1518 IORBH _far *iorb = (IORBH _far *) p1;
1519 int a = iorb_unit_adapter(iorb);
1520 int p = iorb_unit_port(iorb);
1521
1522 ADD_CancelTimer(timer_handle);
1523 dprintf("timeout for IORB %Fp\n", iorb);
1524
1525 /* Move the timed-out IORB to the abort queue. Since it's possible that the
1526 * IORB has completed after the timeout has expired but before we got to
1527 * this line of code, we'll check the return code of iorb_queue_del(): If it
1528 * returns an error, the IORB must have completed a few microseconds ago and
1529 * there is no timeout.
1530 */
1531 spin_lock(drv_lock);
1532 if (iorb_queue_del(&ad_infos[a].ports[p].iorb_queue, iorb) == 0) {
1533 iorb_queue_add(&abort_queue, iorb);
1534 iorb->ErrorCode = IOERR_ADAPTER_TIMEOUT;
1535 }
1536 spin_unlock(drv_lock);
1537
1538 /* Trigger abort processing function. We don't really care whether this
1539 * succeeds because the only reason why it would fail should be multiple
1540 * calls to DevHelp_ArmCtxHook() before the context hook had a chance to
1541 * start executing, which leaves two scenarios:
1542 *
1543 * - We succeded in arming the context hook. Fine.
1544 *
1545 * - We armed the context hook a second time before it had a chance to
1546 * start executing. In this case, the already scheduled context hook
1547 * will process our IORB as well.
1548 */
1549 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1550}
1551
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