source: trunk/src/ahci.c@ 4

Last change on this file since 4 was 4, checked in by root, 15 years ago

initial checkin of CM's code
File size: 48.1 KB
Line 
1/******************************************************************************
2 * ahci.c - ahci hardware access functions
3 *
4 * Copyright (c) 2010 Christian Mueller. Parts copied from/inspired by the
5 * Linux AHCI driver; those parts are (c) Linux AHCI/ATA maintainers
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include "os2ahci.h"
23#include "ata.h"
24#include "atapi.h"
25
26/* -------------------------- macros and constants ------------------------- */
27
28/* produce ata/atapi function pointer with the given func name */
29#define cmd_func(iorb, func) ad_infos[iorb_unit_adapter(iorb)]. \
30 ports[iorb_unit_port(iorb)]. \
31 devs[iorb_unit_device(iorb)].atapi \
32 ? atapi_##func : ata_##func
33
34
35/* ------------------------ typedefs and structures ------------------------ */
36
37/* -------------------------- function prototypes -------------------------- */
38
39static int exec_polled_cmd (AD_INFO *ai, int p, int d, int timeout,
40 int cmd, ...);
41static void ahci_setup_device (AD_INFO *ai, int p, int d, u16 *id_buf);
42static void _far timeout_callback (ULONG timer_handle, ULONG p1, ULONG p2);
43
44/* ------------------------ global/static variables ------------------------ */
45
46/* Initial driver status flags indexed by the board_* constants in os2ahci.h
47 *
48 * NOTE: The Linux AHCI driver uses a combination of board-specific quirk
49 * flags and overriding certain libata service functions to handle
50 * adapter flaws. However, there were only three overrides at the time
51 * os2ahci was written, one for hard adapter resets and two for port
52 * resets, and we can easily implement those within the corresponding
53 * reset handlers. If this becomes more complex, this array of flags
54 * should be converted into a structure array which contains function
55 * pointers to all handler functions which may need to be overridden.
56 */
57u16 initial_flags[] = {
58 0, /* board_ahci */
59 AHCI_HFLAG_NO_NCQ | /* board_ahci_vt8251 */
60 AHCI_HFLAG_NO_PMP,
61 AHCI_HFLAG_IGN_IRQ_IF_ERR, /* board_ahci_ign_iferr */
62 AHCI_HFLAG_IGN_SERR_INTERNAL | /* board_ahci_sb600 */
63 AHCI_HFLAG_NO_MSI |
64 AHCI_HFLAG_SECT255 |
65 AHCI_HFLAG_32BIT_ONLY,
66 AHCI_HFLAG_NO_NCQ | /* board_ahci_mv */
67 AHCI_HFLAG_NO_MSI |
68 AHCI_HFLAG_MV_PATA |
69 AHCI_HFLAG_NO_PMP,
70 AHCI_HFLAG_IGN_SERR_INTERNAL, /* board_ahci_sb700 */
71 AHCI_HFLAG_YES_NCQ, /* board_ahci_mcp65 */
72 AHCI_HFLAG_NO_PMP, /* board_ahci_nopmp */
73 AHCI_HFLAG_YES_NCQ, /* board_ahci_yesncq */
74 AHCI_HFLAG_NO_SNTF, /* board_ahci_nosntf */
75};
76
77/* IRQ levels for stub interrupt handlers. OS/2 calls interrupt handlers
78 * without passing the IRQ level, yet it expects the interrupt handler to
79 * know the IRQ level for EOI processing. Thus we need multiple interrupt
80 * handlers, one for each IRQ, and some mapping from the interrupt handler
81 * index to the corresponding IRQ.
82 */
83static u16 irq_map[MAX_AD]; /* IRQ level for each stub IRQ func */
84static int irq_map_cnt; /* number of IRQ stub funcs used */
85
86/* ----------------------------- start of code ----------------------------- */
87
88/******************************************************************************
89 * Interrupt handlers. Those are stubs which call the real interrupt handler
90 * with the IRQ level as parameter. This mapping is required because OS/2
91 * calls interrupt handlers without any parameters, yet expects them to know
92 * which IRQ level to complete when calling DevHelp_EOI().
93 *
94 * This array of functions needs to be extended when increasing MAX_AD.
95 */
96#if MAX_AD > 8
97#error must extend irq_handler_xx and irq_handlers[] when increasing MAX_AD
98#endif
99
100/* Macro to call AHCI interrupt handler and set/clear carry flag accordingly.
101 * We need to set the carry flag if the interrupt was not handled. This is
102 * done by shifting the return value of ahci_intr() to the right, implying
103 * bit 0 will be set when the interrupt was not handled.
104 */
105#define call_ahci_intr(i) return(ahci_intr(irq_map[i]) >> 1)
106
107static USHORT _far irq_handler_00(void) { call_ahci_intr(0); }
108static USHORT _far irq_handler_01(void) { call_ahci_intr(1); }
109static USHORT _far irq_handler_02(void) { call_ahci_intr(2); }
110static USHORT _far irq_handler_03(void) { call_ahci_intr(3); }
111static USHORT _far irq_handler_04(void) { call_ahci_intr(4); }
112static USHORT _far irq_handler_05(void) { call_ahci_intr(5); }
113static USHORT _far irq_handler_06(void) { call_ahci_intr(6); }
114static USHORT _far irq_handler_07(void) { call_ahci_intr(7); }
115
116PFN irq_handlers[] = {
117 (PFN) irq_handler_00, (PFN) irq_handler_01, (PFN) irq_handler_02,
118 (PFN) irq_handler_03, (PFN) irq_handler_04, (PFN) irq_handler_05,
119 (PFN) irq_handler_06, (PFN) irq_handler_07
120};
121
122/******************************************************************************
123 * Save BIOS configuration of AHCI adapter. As a side effect, this also saves
124 * generic configuration information which we may have to restore after an
125 * adapter reset.
126 *
127 * NOTE: This function also saves working copies of the CAP and CAP2 registers
128 * as well as the initial port map in the AD_INFO structure after
129 * removing features which are known to cause trouble on this specific
130 * piece of hardware.
131 */
132int ahci_save_bios_config(AD_INFO *ai)
133{
134 int ports;
135 int i;
136
137 /* save BIOS configuration */
138 for (i = 0; i < HOST_CAP2; i += sizeof(u32)) {
139 ai->bios_config[i / sizeof(u32)] = readl(ai->mmio + i);
140 }
141
142 /* HOST_CAP2 only exists for AHCI V1.2 and later */
143 if (ai->bios_config[HOST_VERSION / sizeof(u32)] >= 0x00010200L) {
144 ai->bios_config[HOST_CAP2 / sizeof(u32)] = readl(ai->mmio + HOST_CAP2);
145 } else {
146 ai->bios_config[HOST_CAP2 / sizeof(u32)] = 0;
147 }
148
149 /* print AHCI register debug information */
150 if (debug) {
151 printf("AHCI global controller registers:\n");
152 for (i = 0; i <= HOST_CAP2 / sizeof(u32); i++) {
153 u32 val = ai->bios_config[i];
154 printf(" %02x: %08lx", i, val);
155
156 if (i == HOST_CAP) {
157 printf(" -");
158 if (val & HOST_CAP_64) printf(" 64bit");
159 if (val & HOST_CAP_NCQ) printf(" ncq");
160 if (val & HOST_CAP_SNTF) printf(" sntf");
161 if (val & HOST_CAP_MPS) printf(" mps");
162 if (val & HOST_CAP_SSS) printf(" sss");
163 if (val & HOST_CAP_ALPM) printf(" alpm");
164 if (val & HOST_CAP_LED) printf(" led");
165 if (val & HOST_CAP_CLO) printf(" clo");
166 if (val & HOST_CAP_ONLY) printf(" ahci_only");
167 if (val & HOST_CAP_PMP) printf(" pmp");
168 if (val & HOST_CAP_FBS) printf(" fbs");
169 if (val & HOST_CAP_PIO_MULTI) printf(" pio_multi");
170 if (val & HOST_CAP_SSC) printf(" ssc");
171 if (val & HOST_CAP_PART) printf(" part");
172 if (val & HOST_CAP_CCC) printf(" ccc");
173 if (val & HOST_CAP_EMS) printf(" ems");
174 if (val & HOST_CAP_SXS) printf(" sxs");
175 printf(" ports:%d", (val & 0x1f) + 1);
176
177 } else if (i == HOST_CTL) {
178 printf(" -");
179 if (val & HOST_AHCI_EN) printf(" ahci_enabled");
180 if (val & HOST_IRQ_EN) printf(" irq_enabled");
181 if (val & HOST_RESET) printf(" resetting");
182
183 } else if (i == HOST_CAP2) {
184 printf(" -");
185 if (val & HOST_CAP2_BOH) printf(" boh");
186 if (val & HOST_CAP2_NVMHCI) printf(" nvmhci");
187 if (val & HOST_CAP2_APST) printf(" apst");
188
189 }
190 printf("\n");
191 }
192 }
193
194 /* Save working copies of CAP, CAP2 and port_map and remove broken feature
195 * bits. This is largely copied from the Linux AHCI driver -- the wisdom
196 * around quirks and faulty hardware is hard to come by...
197 */
198 ai->cap = ai->bios_config[HOST_CAP / sizeof(u32)];
199 ai->cap2 = ai->bios_config[HOST_CAP2 / sizeof(u32)];
200 ai->port_map = ai->bios_config[HOST_PORTS_IMPL / sizeof(u32)];
201
202 if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags)) {
203 dprintf("error: invalid board index in PCI info\n");
204 return(-1);
205 }
206 ai->flags = initial_flags[ai->pci->board];
207
208 if ((ai->cap & HOST_CAP_64) && (ai->flags & AHCI_HFLAG_32BIT_ONLY)) {
209 /* disable 64-bit support for faulty controllers; OS/2 can't do 64 bits at
210 * this point, of course, but who knows where all this will be in a few
211 * years...
212 */
213 ai->cap &= ~HOST_CAP_64;
214 }
215
216 if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ)) {
217 dprintf("controller can't do NCQ, turning off CAP_NCQ\n");
218 ai->cap &= ~HOST_CAP_NCQ;
219 }
220
221 if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ)) {
222 dprintf("controller can do NCQ, turning on CAP_NCQ\n");
223 ai->cap |= HOST_CAP_NCQ;
224 }
225
226 if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP)) {
227 dprintf("controller can't do PMP, turning off CAP_PMP\n");
228 ai->cap |= HOST_CAP_PMP;
229 }
230
231 if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF)) {
232 dprintf("controller can't do SNTF, turning off CAP_SNTF\n");
233 ai->cap &= ~HOST_CAP_SNTF;
234 }
235
236 if (ai->pci->vendor == PCI_VENDOR_ID_JMICRON &&
237 ai->pci->device == 0x2361 && ai->port_map != 1) {
238 dprintf("JMB361 has only one port, port_map 0x%x -> 0x%x\n", ai->port_map, 1);
239 ai->port_map = 1;
240 }
241
242 /* Correlate port map to number of ports reported in HOST_CAP
243 *
244 * NOTE: Port map and number of ports handling differs a bit from the
245 * Linux AHCI driver because we're storing both in AI_INFO. As in the
246 * Linux driver, the port map is the main driver for port scanning but
247 * we're also saving a maximum port number in AI_INFO to reduce the
248 * number of IORB queues to look at in trigger_engine(). This is done
249 * in ahci_scan_ports().
250 */
251 ports = (ai->cap & 0x1f) + 1;
252 for (i = 0; i < AHCI_MAX_PORTS; i++) {
253 if (ai->port_map & (1UL << i)) {
254 ports--;
255 }
256 }
257 if (ports < 0) {
258 /* more ports in port_map than in HOST_CAP & 0x1f */
259 ports = (ai->cap & 0x1f) + 1;
260 dprintf("implemented port map (0x%lx) contains more "
261 "ports than nr_ports (%d), using nr_ports\n",
262 ai->port_map, ports);
263 ai->port_map = (1UL << ports) - 1UL;
264 }
265
266 /* set maximum command slot number */
267 ai->cmd_max = (u16) ((ai->cap >> 8) & 31);
268
269 return(0);
270}
271
272/******************************************************************************
273 * Restore BIOS configuration of AHCI adapter. This is needed after scanning
274 * for devices because we still need the BIOS until the initial boot sequence
275 * has completed.
276 */
277int ahci_restore_bios_config(AD_INFO *ai)
278{
279 ddprintf("restoring AHCI BIOS configuration\n");
280
281 /* restore saved BIOS configuration */
282 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
283 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
284 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
285 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
286
287 /* flush PCI MMIO delayed write buffers */
288 readl(ai->mmio + HOST_EM_CTL);
289
290 return(0);
291}
292
293/******************************************************************************
294 * Restore initial configuration (e.g. after an adapter reset). This relies
295 * on information saved by 'ahci_save_bios_config()'.
296 */
297int ahci_restore_initial_config(AD_INFO *ai)
298{
299 ddprintf("restoring initial configuration\n");
300
301 /* restore saved BIOS configuration */
302 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
303 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
304 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
305 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
306
307 /* flush PCI MMIO delayed write buffers */
308 readl(ai->mmio + HOST_EM_CTL);
309
310 /* (re-)enable AHCI mode */
311 ahci_enable_ahci(ai);
312
313 return(0);
314}
315
316/******************************************************************************
317 * Save port configuration. This is primarily used to save the BIOS port
318 * configuration (command list and FIS buffers and the IRQ mask).
319 *
320 * The port configuration returned by this function is dynamically allocated
321 * and automatically freed when calling ahci_restore_port_config().
322 */
323AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p)
324{
325 AHCI_PORT_CFG *pc;
326 u8 _far *port_mmio = port_base(ai, p);
327
328 if ((pc = malloc(sizeof(*pc))) == NULL) {
329 return(NULL);
330 }
331
332 pc->cmd_list = readl(port_mmio + PORT_LST_ADDR);
333 pc->cmd_list_h = readl(port_mmio + PORT_LST_ADDR_HI);
334 pc->fis_rx = readl(port_mmio + PORT_FIS_ADDR);
335 pc->fis_rx_h = readl(port_mmio + PORT_FIS_ADDR_HI);
336 pc->irq_mask = readl(port_mmio + PORT_IRQ_MASK);
337
338 return(pc);
339}
340
341/******************************************************************************
342 * Restore port configuration. This is primarily used to restore the BIOS port
343 * configuration (command list and FIS buffers and the IRQ mask).
344 *
345 * The port configuration automatically freed.
346 */
347void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc)
348{
349 u8 _far *port_mmio = port_base(ai, p);
350
351 writel(port_mmio + PORT_LST_ADDR, pc->cmd_list);
352 writel(port_mmio + PORT_LST_ADDR_HI, pc->cmd_list_h);
353 writel(port_mmio + PORT_FIS_ADDR, pc->fis_rx);
354 writel(port_mmio + PORT_FIS_ADDR_HI, pc->fis_rx_h);
355 writel(port_mmio + PORT_IRQ_MASK, pc->irq_mask);
356
357 readl(port_base(ai, p) + PORT_IRQ_MASK); /* flush */
358
359 free(pc);
360}
361
362/******************************************************************************
363 * Enable AHCI mode on this controller.
364 */
365int ahci_enable_ahci(AD_INFO *ai)
366{
367 u32 ctl = readl(ai->mmio + HOST_CTL);
368 int i;
369
370 if (ctl & HOST_AHCI_EN) {
371 /* AHCI mode already enbled */
372 return(0);
373 }
374
375 /* some controllers need AHCI_EN to be written multiple times */
376 for (i = 0; i < 5; i++) {
377 ctl |= HOST_AHCI_EN;
378 writel(ai->mmio + HOST_CTL, ctl);
379 ctl = readl(ai->mmio + HOST_CTL); /* flush && sanity check */
380 if (ctl & HOST_AHCI_EN) {
381 return(0);
382 }
383 mdelay(10);
384 }
385
386 /* couldn't enable AHCI mode */
387 dprintf("failed to enable AHCI mode on adapter #%d\n", ad_no(ai));
388 return(1);
389}
390
391/******************************************************************************
392 * Scan all ports for connected devices and fill in the corresponding device
393 * information.
394 *
395 * NOTES:
396 *
397 * - The adapter is temporarily configured for os2ahci but the original BIOS
398 * configuration will be restored when done. This happens only until we
399 * have received the IOCC_COMPLETE_INIT command.
400 *
401 * - Subsequent calls are currently not planned but may be required for
402 * suspend/resume handling, hot swap functionality, etc.
403 *
404 * - This function is expected to be called with the spinlock released but
405 * the corresponding adapter's busy flag set. It will aquire the spinlock
406 * temporarily to allocate/free memory for ATA identify buffer.
407 */
408int ahci_scan_ports(AD_INFO *ai)
409{
410 AHCI_PORT_CFG *pc = NULL;
411 u16 *id_buf;
412 int rc;
413 int p;
414
415 spin_lock(drv_lock);
416 id_buf = malloc(ATA_ID_WORDS * sizeof(u16));
417 spin_unlock(drv_lock);
418 if (id_buf == NULL) {
419 return(-1);
420 }
421
422 if (ai->bios_config[0] == 0) {
423 /* first call */
424 ahci_save_bios_config(ai);
425 }
426
427 if (ahci_enable_ahci(ai)) {
428 goto exit_port_scan;
429 }
430
431 /* perform port scan */
432 dprintf("scanning ports on adapter #%d\n", ad_no(ai));
433 for (p = 0; p < AHCI_MAX_PORTS; p++) {
434 if (ai->port_map & (1UL << p)) {
435
436 if (!init_complete) {
437 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
438 goto exit_port_scan;
439 }
440 }
441
442 /* start/reset port; if no device is attached, this is expected to fail */
443 if (init_reset) {
444 ddprintf("resetting port #%d\n", p);
445 rc = ahci_reset_port(ai, p, 0);
446 } else {
447 ddprintf("(re)starting port #%d\n", p);
448 ahci_stop_port(ai, p);
449 rc = ahci_start_port(ai, p, 0);
450 }
451 if (rc) {
452 /* no device attached to this port */
453 ai->port_map &= ~(1UL << p);
454 goto restore_port_config;
455 }
456
457 /* this port has a device attached and is ready to accept commands */
458 ddprintf("port #%d seems to be attached to a device; probing...\n", p);
459 rc = exec_polled_cmd(ai, p, 0, 500, ATA_CMD_ID_ATA,
460 AP_VADDR, (void _far *) id_buf, 512,
461 AP_END);
462
463 if (rc != 0 || id_buf[ATA_ID_CONFIG] & (1U << 15)) {
464 /* this might be an ATAPI device; run IDENTIFY_PACKET_DEVICE */
465 rc = exec_polled_cmd(ai, p, 0, 500, ATA_CMD_ID_ATAPI,
466 AP_VADDR, (void _far *) id_buf, 512,
467 AP_END);
468 }
469
470 if (rc == 0) {
471 /* we have a valid IDENTIFY or IDENTIFY_PACKET response */
472 ddphex(id_buf, 512, "ATA_IDENTIFY(_PACKET) results:\n");
473 ahci_setup_device(ai, p, 0, id_buf);
474 } else {
475 /* no device attached to this port */
476 ai->port_map &= ~(1UL << p);
477 }
478
479 restore_port_config:
480 if (pc != NULL) {
481 ahci_restore_port_config(ai, p, pc);
482 }
483 }
484 }
485
486exit_port_scan:
487 if (!init_complete) {
488 ahci_restore_bios_config(ai);
489 }
490 spin_lock(drv_lock);
491 free(id_buf);
492 spin_unlock(drv_lock);
493 return(0);
494}
495
496/******************************************************************************
497 * Complete initialization of adapter. This includes restarting all active
498 * ports and initializing interrupt processing. This is called when receiving
499 * the IOCM_COMPLETE_INIT request.
500 */
501int ahci_complete_init(AD_INFO *ai)
502{
503 int rc;
504 int p;
505 int i;
506
507 dprintf("completing initialization of adapter #%d\n", ad_no(ai));
508
509 /* register IRQ handlers; each IRQ level is registered only once */
510 for (i = 0; i < irq_map_cnt; i++) {
511 if (irq_map[i] == ai->irq) {
512 /* we already have this IRQ registered */
513 break;
514 }
515 }
516
517 if (i >= irq_map_cnt) {
518 dprintf("registering interrupt #%d\n", ai->irq);
519
520 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 1) != 0) {
521 dprintf("failed to register shared interrupt\n");
522
523 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 0) != 0) {
524 dprintf("failed to register exclusive interrupt\n");
525 return(-1);
526 }
527 }
528 irq_map[irq_map_cnt++] = ai->irq;
529 }
530
531 /* enable AHCI mode */
532 if ((rc = ahci_enable_ahci(ai)) != 0) {
533 return(rc);
534 }
535
536 /* Start all ports. The main purpose is to set the command list and FIS
537 * receive area addresses properly and to enable port-level interrupts; we
538 * don't really care about the return status because we'll find out soon
539 * enough if a previously detected device has problems.
540 */
541 for (p = 0; p < AHCI_MAX_PORTS; p++) {
542 if (ai->port_map & (1UL << p)) {
543 dprintf("restarting port #%d\n", p);
544 ahci_stop_port(ai, p);
545 ahci_start_port(ai, p, 1);
546 }
547 }
548
549 /* enable adapter-level interrupts */
550 writel(ai->mmio + HOST_CTL, HOST_IRQ_EN);
551 readl(ai->mmio + HOST_CTL); /* flush */
552
553 /* enable interrupts on PCI-level (PCI 2.3 added a feature to disable ints) */
554 pci_enable_int(ai->bus, ai->dev_func);
555
556 return(0);
557}
558
559/******************************************************************************
560 * Reset specified port. This function is typically called during adapter
561 * initialization and first gets the port into a defined status, then resets
562 * the port by sending a COMRESET signal.
563 *
564 * This function is also the location of the link speed initialization (link
565 * needs to be restablished after changing link speed, anyway).
566 *
567 * NOTE: This function uses a busy loop to wait for DMA engines to stop and
568 * the COMRESET to complete. It should only be called at task time
569 * during initialization or in a context hook.
570 */
571int ahci_reset_port(AD_INFO *ai, int p, int ei)
572{
573 u8 _far *port_mmio = port_base(ai, p);
574 u32 tmp;
575 int timeout = 500;
576
577 dprintf("resetting port %d.%d\n", ad_no(ai), p);
578
579 /* stop port engines (we don't care whether there is an error doing so) */
580 ahci_stop_port(ai, p);
581
582 /* clear SError */
583 tmp = readl(port_mmio + PORT_SCR_ERR);
584 ddprintf(" PORT_SCR_ERR = 0x%lx\n", tmp);
585 writel(port_mmio + PORT_SCR_ERR, tmp);
586
587 /* clear pending port IRQs */
588 tmp = readl(port_mmio + PORT_IRQ_STAT);
589 if (tmp) {
590 writel(port_mmio + PORT_IRQ_STAT, tmp);
591 }
592 ddprintf(" PORT_IRQ_STAT = 0x%lx\n", tmp);
593 ddprintf(" PORT_IRQ_MASK = 0x%lx\n", readl(port_mmio + PORT_IRQ_MASK));
594 ddprintf(" HOST_IRQ_STAT = 0x%lx\n", readl(ai->mmio + HOST_IRQ_STAT));
595 writel(ai->mmio + HOST_IRQ_STAT, 1UL << p);
596
597 /* set link speed */
598 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x000000f0UL;
599 writel(port_mmio + PORT_SCR_CTL, tmp | (link_speed[ad_no(ai)][p] << 4));
600
601 /* issue COMRESET on the port */
602 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x0000000fUL;
603 writel(port_mmio + PORT_SCR_CTL, tmp | 1);
604 readl(port_mmio + PORT_SCR_CTL); /* flush */
605
606 /* spec says "leave reset bit on for at least 1ms"; make it 2ms */
607 mdelay(2);
608
609 writel(port_mmio + PORT_SCR_CTL, tmp);
610 readl(port_mmio + PORT_SCR_CTL); /* flush */
611
612 /* wait for communication to be re-established after port reset */
613 while (((tmp = readl(port_mmio + PORT_SCR_STAT) & 3)) != 3) {
614 mdelay(10);
615 timeout -= 10;
616 if (timeout <= 0) {
617 dprintf("no device present after resetting port #%d "
618 "(PORT_SCR_STAT = 0x%lx)\n", p, tmp);
619 return(-1);
620 }
621 }
622
623 /* clear SError again (recommended by AHCI spec) */
624 tmp = readl(port_mmio + PORT_SCR_ERR);
625 writel(port_mmio + PORT_SCR_ERR, tmp);
626
627 /* start port so we can receive the COMRESET FIS */
628 ahci_start_port(ai, p, ei);
629
630 /* wait for device to be ready ((PxTFD & (BSY | DRQ | ERR)) == 0) */
631 while (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
632 mdelay(10);
633 timeout -= 10;
634 if (timeout <= 0) {
635 dprintf("device not ready on port #%d "
636 "(PORT_TFDATA = 0x%lx)\n", p, tmp);
637 ahci_stop_port(ai, p);
638 return(-1);
639 }
640 }
641 ddprintf(" PORT_TFDATA = 0x%lx\n", readl(port_mmio + PORT_TFDATA));
642
643 return(0);
644}
645
646/******************************************************************************
647 * Start specified port.
648 */
649int ahci_start_port(AD_INFO *ai, int p, int ei)
650{
651 u8 _far *port_mmio = port_base(ai, p);
652 u32 status;
653
654 /* check whether device presence is detected and link established */
655 status = readl(port_mmio + PORT_SCR_STAT);
656 ddprintf(" PORT_SCR_STAT = 0x%lx\n", status);
657 if ((status & 0xf) != 3) {
658 return(-1);
659 }
660
661 /* enable FIS reception */
662 ahci_start_fis_rx(ai, p);
663
664 /* enable DMA */
665 ahci_start_engine(ai, p);
666
667 if (ei) {
668 /* enable port interrupts */
669 writel(port_mmio + PORT_IRQ_MASK, PORT_IRQ_TF_ERR |
670 PORT_IRQ_HBUS_ERR |
671 PORT_IRQ_HBUS_DATA_ERR |
672 PORT_IRQ_IF_ERR |
673 PORT_IRQ_OVERFLOW |
674 PORT_IRQ_BAD_PMP |
675 PORT_IRQ_UNK_FIS |
676 PORT_IRQ_SDB_FIS |
677 PORT_IRQ_D2H_REG_FIS);
678 } else {
679 writel(port_mmio + PORT_IRQ_MASK, 0);
680 }
681 readl(port_mmio + PORT_IRQ_MASK); /* flush */
682
683 return(0);
684}
685
686/******************************************************************************
687 * Start port FIS reception. Copied from Linux AHCI driver and adopted to
688 * OS2AHCI.
689 */
690void ahci_start_fis_rx(AD_INFO *ai, int p)
691{
692 u8 _far *port_mmio = port_base(ai, p);
693 u32 port_dma = port_dma_base_phys(ai, p);
694 u32 tmp;
695
696 /* set comand header and FIS address registers */
697 writel(port_mmio + PORT_LST_ADDR, port_dma + offsetof(AHCI_PORT_DMA, cmd_hdr));
698 writel(port_mmio + PORT_LST_ADDR_HI, 0);
699 writel(port_mmio + PORT_FIS_ADDR, port_dma + offsetof(AHCI_PORT_DMA, rx_fis));
700 writel(port_mmio + PORT_FIS_ADDR_HI, 0);
701
702 /* enable FIS reception */
703 tmp = readl(port_mmio + PORT_CMD);
704 tmp |= PORT_CMD_FIS_RX;
705 writel(port_mmio + PORT_CMD, tmp);
706
707 /* flush */
708 readl(port_mmio + PORT_CMD);
709}
710
711/******************************************************************************
712 * Start port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
713 */
714void ahci_start_engine(AD_INFO *ai, int p)
715{
716 u8 _far *port_mmio = port_base(ai, p);
717 u32 tmp;
718
719 /* start DMA */
720 tmp = readl(port_mmio + PORT_CMD);
721 tmp |= PORT_CMD_START;
722 writel(port_mmio + PORT_CMD, tmp);
723 readl(port_mmio + PORT_CMD); /* flush */
724}
725
726/******************************************************************************
727 * Stop specified port
728 */
729int ahci_stop_port(AD_INFO *ai, int p)
730{
731 u8 _far *port_mmio = port_base(ai, p);
732 int rc;
733
734 /* disable FIS reception */
735 if ((rc = ahci_stop_fis_rx(ai, p)) != 0) {
736 dprintf("error: failed to stop FIS receive (%d)\n", rc);
737 return(rc);
738 }
739
740 /* disable DMA */
741 if ((rc = ahci_stop_engine(ai, p)) != 0) {
742 dprintf("error: failed to stop port HW engine (%d)\n", rc);
743 return(rc);
744 }
745
746 /* reset PxSACT register (tagged command queues, not reset by COMRESET) */
747 writel(port_mmio + PORT_SCR_ACT, 0);
748 readl(port_mmio + PORT_SCR_ACT); /* flush */
749
750 return(0);
751}
752
753/******************************************************************************
754 * Stop port FIS reception. Copied from Linux AHCI driver and adopted to
755 * OS2AHCI.
756 *
757 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
758 * should only be called at task time during initialization or in a
759 * context hook (e.g. when resetting a port).
760 */
761int ahci_stop_fis_rx(AD_INFO *ai, int p)
762{
763 u8 _far *port_mmio = port_base(ai, p);
764 int timeout = 1000;
765 u32 tmp;
766
767 /* disable FIS reception */
768 tmp = readl(port_mmio + PORT_CMD);
769 tmp &= ~PORT_CMD_FIS_RX;
770 writel(port_mmio + PORT_CMD, tmp);
771
772 /* wait for completion, spec says 500ms, give it 1000 */
773 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_FIS_ON)) {
774 mdelay(10);
775 timeout -= 10;
776 }
777
778 return((timeout <= 0) ? -1 : 0);
779}
780
781/******************************************************************************
782 * Stop port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
783 *
784 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
785 * should only be called at task time during initialization or in a
786 * context hook (e.g. when resetting a port).
787 */
788int ahci_stop_engine(AD_INFO *ai, int p)
789{
790 u8 _far *port_mmio = port_base(ai, p);
791 int timeout = 500;
792 u32 tmp;
793
794 tmp = readl(port_mmio + PORT_CMD);
795
796 /* check if the port is already stopped */
797 if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) {
798 return 0;
799 }
800
801 /* set port to idle */
802 tmp &= ~PORT_CMD_START;
803 writel(port_mmio + PORT_CMD, tmp);
804
805 /* wait for engine to stop. This could be as long as 500 msec */
806 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_LIST_ON)) {
807 mdelay(10);
808 timeout -= 10;
809 }
810
811 return((timeout <= 0) ? -1 : 0);
812}
813
814/******************************************************************************
815 * Execute AHCI command for given IORB. This includes all steps typically
816 * required by any of the ahci_*() IORB processing functions.
817 *
818 * NOTE: In order to prevent race conditions with port restart and reset
819 * handlers, we either need to keep the spinlock during the whole
820 * operation or set the adapter's busy flag. Since the expectation
821 * is that command preparation will be quick (it certainly doesn't
822 * involve delays), we're going with the spinlock for the time being.
823 */
824void ahci_exec_iorb(IORBH _far *iorb, int ncq_capable,
825 int (*func)(IORBH _far *, int))
826{
827 volatile u32 *cmds;
828 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
829 P_INFO *port = ai->ports + iorb_unit_port(iorb);
830 ULONG timeout = (iorb->Timeout > 0) ? iorb->Timeout : DEFAULT_TIMEOUT;
831 u8 _far *port_mmio = port_base(ai, iorb_unit_port(iorb));
832 int is_ncq = ((ai->cap & HOST_CAP_NCQ) &&
833 ncq_capable &&
834 !add_workspace(iorb)->no_ncq);
835 int i;
836
837 /* NCQ disabled temporarily until non-NCQ commands are working fine */
838 is_ncq = 0;
839
840 /* check whether adapter is available */
841 spin_lock(drv_lock);
842 if (!ai->busy) {
843
844 if (!init_complete) {
845 ai->busy = 1;
846 spin_unlock(drv_lock);
847 ahci_exec_polled_iorb(iorb, func, timeout);
848 ai->busy = 0;
849 return;
850 }
851
852 /* prevent NCQ/regular command mix */
853 if (is_ncq && port->reg_cmds == 0 || !is_ncq && port->ncq_cmds == 0) {
854
855 /* Find next available command slot. We use a simple round-robin
856 * algorithm for this to prevent commands with higher slot indexes
857 * from stalling when new commands are coming in frequently.
858 */
859 cmds = (is_ncq) ? &port->ncq_cmds : &port->reg_cmds;
860 for (i = 0; i <= ai->cmd_max; i++) {
861 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
862 break;
863 }
864 if (++(port->cmd_slot) >= ai->cmd_max) {
865 port->cmd_slot = 0;
866 }
867 }
868
869 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
870 /* prepare command */
871 if (func(iorb, port->cmd_slot)) {
872 /* Command preparation failed, or no HW command required; IORB
873 * will already have the error code if there was an error.
874 */
875 spin_unlock(drv_lock);
876 iorb_done(iorb);
877 return;
878 }
879
880 /* start timer for this IORB */
881 ADD_StartTimerMS(&add_workspace(iorb)->timer, timeout,
882 (PFN) timeout_callback, iorb, 0);
883
884 /* update IORB and increment next command index */
885 add_workspace(iorb)->queued_hw = 1;
886 add_workspace(iorb)->cmd_slot = port->cmd_slot;
887 if (++(port->cmd_slot) >= ai->cmd_max) {
888 port->cmd_slot = 0;
889 }
890
891 /* issue command to hardware */
892 dprintf("issuing command on slot %d\n", port->cmd_slot);
893 *cmds |= (1UL << port->cmd_slot);
894 if (is_ncq) {
895 writel(port_mmio + PORT_SCR_ACT, (1UL << port->cmd_slot));
896 readl(port_mmio + PORT_SCR_ACT); /* flush */
897 }
898 writel(port_mmio + PORT_CMD_ISSUE, (1UL << port->cmd_slot));
899 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
900
901 spin_unlock(drv_lock);
902 return;
903 }
904 }
905 }
906
907 /* requeue this IORB; it will be picked up again in trigger_engine() */
908 add_workspace(iorb)->processing = 0;
909 spin_unlock(drv_lock);
910}
911
912/******************************************************************************
913 * Execute polled IORB command. This function is called by ahci_exec_iorb()
914 * when the initialization has not yet completed. The reasons for polling until
915 * initialization has completed are:
916 *
917 * - We need to restore the BIOS configuration after we're done with this
918 * command because we might still need the BIOS to load additional drivers.
919 * - Our context hooks won't work while the device managers are initializing
920 * (they can't yield at init time).
921 * - The device managers typically poll for command completion during
922 * initialization so it won't make much of a difference, anyway.
923 *
924 * NOTE: This function must be called with the adapter-level busy flag set but
925 * without the driver-level spinlock held.
926 */
927void ahci_exec_polled_iorb(IORBH _far *iorb, int (*func)(IORBH _far *, int),
928 ULONG timeout)
929{
930 AHCI_PORT_CFG *pc = NULL;
931 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
932 int p = iorb_unit_port(iorb);
933 u8 _far *port_mmio = port_base(ai, p);
934
935 /* enable AHCI mode */
936 if (ahci_enable_ahci(ai) != 0) {
937 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
938 goto restore_bios_config;
939 }
940
941 /* check whether command slot 0 is available */
942 if ((readl(port_mmio + PORT_CMD_ISSUE) & 1) != 0) {
943 iorb_seterr(iorb, IOERR_DEVICE_BUSY);
944 goto restore_bios_config;
945 }
946
947 /* save port configuration */
948 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
949 iorb_seterr(iorb, IOERR_CMD_SW_RESOURCE);
950 goto restore_bios_config;
951 }
952
953 /* restart port (includes the necessary port configuration */
954 if (ahci_stop_port(ai, p) || ahci_start_port(ai, p, 0)) {
955 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
956 goto restore_bios_config;
957 }
958
959 /* prepare command */
960 if (func(iorb, 0) == 0) {
961 /* successfully prepared cmd; issue cmd and wait for completion */
962 ddprintf("executing polled cmd...");
963 writel(port_mmio + PORT_CMD_ISSUE, 1);
964 timeout /= 10;
965 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
966 mdelay(10);
967 timeout--;
968 }
969 ddprintf(" done (time left = %ld)\n", timeout * 10);
970
971 if (timeout == 0) {
972 dprintf("timeout for IORB %Fp\n", iorb);
973 iorb_seterr(iorb, IOERR_ADAPTER_TIMEOUT);
974
975 } else if (readl(port_mmio + PORT_SCR_ERR) != 0 ||
976 readl(port_mmio + PORT_TFDATA) & 0x89) {
977 dprintf("polled cmd error for IORB %Fp\n", iorb);
978 iorb_seterr(iorb, IOERR_DEVICE_NONSPECIFIC);
979 ahci_reset_port(ai, iorb_unit_port(iorb), 0);
980
981 } else {
982 /* successfully executed command */
983 if (add_workspace(iorb)->ppfunc != NULL) {
984 add_workspace(iorb)->ppfunc(iorb);
985 }
986 }
987 }
988
989restore_bios_config:
990 /* restore BIOS configuration */
991 if (pc != NULL) {
992 ahci_restore_port_config(ai, p, pc);
993 }
994 ahci_restore_bios_config(ai);
995
996 iorb_done(iorb);
997 return;
998}
999
1000/******************************************************************************
1001 * AHCI top-level hardware interrupt handler. This handler finds the adapters
1002 * and ports which have issued the interrupt and calls the corresponding
1003 * port interrupt handler.
1004 *
1005 * On entry, OS/2 will have processor interrupts enabled because we're using
1006 * shared IRQs but we won't be preempted by another interrupt on the same IRQ
1007 * IRQ level until we indicated EOI. We'll keep it this way, only requesting
1008 * the driver-level spinlock when actually changing the driver state (IORB
1009 * queues, ...)
1010 */
1011int ahci_intr(u16 irq)
1012{
1013 u32 irq_stat;
1014 int handled = 0;
1015 int a;
1016 int p;
1017
1018 /* find adapter(s) with pending interrupts */
1019 for (a = 0; a < ad_info_cnt; a++) {
1020 AD_INFO *ai = ad_infos + a;
1021
1022 if (ai->irq == irq && (irq_stat = readl(ai->mmio + HOST_IRQ_STAT)) != 0) {
1023 /* this adapter has interrupts pending */
1024 u32 irq_masked = irq_stat & ai->port_map;
1025
1026 for (p = 0; p <= ai->port_max; p++) {
1027 if (irq_masked & (1UL << p)) {
1028 ahci_port_intr(ai, p);
1029 }
1030 }
1031
1032 /* clear interrupt condition on the adapter */
1033 writel(ai->mmio + HOST_IRQ_STAT, irq_stat);
1034 readl(ai->mmio + HOST_IRQ_STAT); /* flush */
1035 handled = 1;
1036 }
1037 }
1038
1039 if (handled) {
1040 /* trigger state machine to process next IORBs, if any */
1041 spin_lock(drv_lock);
1042 trigger_engine();
1043 spin_unlock(drv_lock);
1044
1045 /* complete the interrupt */
1046 DevHelp_EOI(irq);
1047 return(0);
1048 } else {
1049 return(1);
1050 }
1051}
1052
1053/******************************************************************************
1054 * AHCI port-level interrupt handler. As described above, processor interrupts
1055 * are enabled on entry thus we have to protect shared resources with a
1056 * spinlock.
1057 */
1058void ahci_port_intr(AD_INFO *ai, int p)
1059{
1060 IORB_QUEUE done_queue;
1061 IORBH _far *iorb;
1062 IORBH _far *next = NULL;
1063 u8 _far *port_mmio = port_base(ai, p);
1064 u32 irq_stat;
1065 u32 active_cmds;
1066 u32 done_mask;
1067
1068 ddprintf("port interrupt for adapter #%d, port #%d\n", ad_no(ai), p);
1069 memset(&done_queue, 0x00, sizeof(done_queue));
1070
1071 /* get interrupt status and clear it right away */
1072 irq_stat = readl(port_mmio + PORT_IRQ_STAT);
1073 writel(port_mmio + PORT_IRQ_STAT, irq_stat);
1074 readl(port_mmio + PORT_IRQ_STAT); /* flush */
1075
1076 if (irq_stat & PORT_IRQ_ERROR) {
1077 /* this is an error interrupt */
1078 ahci_error_intr(ai, p, irq_stat);
1079 return;
1080 }
1081
1082 spin_lock(drv_lock);
1083
1084 /* Find out which command slots have completed. Since error recovery for
1085 * NCQ commands interfers with non-NCQ commands, the upper layers will
1086 * make sure there's never a mixture of NCQ and non-NCQ commands active
1087 * on any port at any given time. This makes it easier to find out which
1088 * commands have completed, too.
1089 */
1090 if (ai->ports[p].ncq_cmds != 0) {
1091 active_cmds = readl(port_mmio + PORT_SCR_ACT);
1092 done_mask = ai->ports[p].ncq_cmds ^ active_cmds;
1093 ddprintf("[ncq_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1094 active_cmds, done_mask);
1095 } else {
1096 active_cmds = readl(port_mmio + PORT_CMD_ISSUE);
1097 done_mask = ai->ports[p].reg_cmds ^ active_cmds;
1098 ddprintf("[reg_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1099 active_cmds, done_mask);
1100 }
1101
1102 /* Find the IORBs related to the completed commands and complete them.
1103 *
1104 * NOTES: The spinlock must not be released while in this loop to prevent
1105 * race conditions with timeout handlers or other threads in SMP
1106 * systems.
1107 *
1108 * Since we hold the spinlock when IORBs complete, we can't call the
1109 * IORB notification routine right away because this routine might
1110 * schedule another IORB which could cause a deadlock. Thus, we'll
1111 * add all IORBs to be completed to a temporary queue which will be
1112 * processed after releasing the spinlock.
1113 */
1114 for (iorb = ai->ports[p].iorb_queue.root; iorb != NULL; iorb = next) {
1115 ADD_WORKSPACE _far *aws = (ADD_WORKSPACE _far *) &iorb->ADDWorkSpace;
1116 next = iorb->pNxtIORB;
1117 if (aws->queued_hw && (done_mask & (1UL << aws->cmd_slot))) {
1118 /* this command has completed */
1119 if (aws->ppfunc != NULL) {
1120 aws->ppfunc(iorb);
1121 }
1122 aws_free(aws);
1123
1124 /* move IORB to our temporary done queue */
1125 iorb_queue_del(&ai->ports[p].iorb_queue, iorb);
1126 iorb_queue_add(&done_queue, iorb);
1127
1128 /* clear corresponding bit in issued command bitmaps */
1129 ai->ports[p].ncq_cmds &= ~(1UL << aws->cmd_slot);
1130 ai->ports[p].reg_cmds &= ~(1UL << aws->cmd_slot);
1131 }
1132 }
1133
1134 spin_unlock(drv_lock);
1135
1136 /* call notification routines for all IORBs in the done queue */
1137 for (iorb = done_queue.root; iorb != NULL; iorb = next) {
1138 next = iorb->pNxtIORB;
1139 iorb->Status = IORB_DONE;
1140 if (iorb->RequestControl & IORB_ASYNC_POST) {
1141 iorb->NotifyAddress(iorb);
1142 }
1143 }
1144}
1145
1146/******************************************************************************
1147 * AHCI error interrupt handler. Errors include interface errors and device
1148 * errors (usually triggered by the error bit in the AHCI task file register).
1149 *
1150 * Since this involves long-running operations such as restarting or even
1151 * resetting a port, this function is invoked at task time via a context
1152 * hook.
1153 *
1154 * NOTE: AHCI controllers stop all processing when encountering an error
1155 * condition in order to give the driver time to find out what exactly
1156 * went wrong. This means no new commands will be processed until we
1157 * clear the error register and restore the "commands issued" register.
1158 */
1159void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat)
1160{
1161 u8 _far *port_mmio = port_base(ai, p);
1162 int reset_port = 0;
1163 u32 tmp;
1164
1165 /* Handle adapter and interface errors. Those typically require a port
1166 * reset, or worse.
1167 */
1168 if (irq_stat & PORT_IRQ_UNK_FIS) {
1169 u32 _far *unk = (u32 _far *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK);
1170 dprintf("warning: unknown FIS %08lx %08lx %08lx %08lx\n",
1171 unk[0], unk[1], unk[2], unk[3]);
1172 reset_port = 1;
1173 }
1174 if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) {
1175 dprintf("warning: host bus [data] error for port #%d\n", p);
1176 reset_port = 1;
1177 }
1178 if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR)) {
1179 dprintf("warning: interface fatal error for port #%d\n", p);
1180 reset_port = 1;
1181 }
1182 if (reset_port) {
1183 /* need to reset the port; leave this to the reset context hook */
1184 ports_to_reset[ad_no(ai)] |= 1UL << p;
1185 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1186
1187 /* no point analyzing device errors after a reset... */
1188 return;
1189 }
1190
1191 /* Handle device-specific errors. Those errors typically involve restarting
1192 * the corresponding port to resume operations which can take some time,
1193 * thus we need to offload this functionality to the restart context hook.
1194 */
1195 if (irq_stat & PORT_IRQ_TF_ERR) {
1196 ports_to_restart[ad_no(ai)] |= 1UL << p;
1197 DevHelp_ArmCtxHook(0, restart_ctxhook_h);
1198 }
1199}
1200
1201/******************************************************************************
1202 * Get device or media geometry. Device and media geometry are expected to be
1203 * the same for non-removable devices.
1204 */
1205void ahci_get_geometry(IORBH _far *iorb)
1206{
1207 ahci_exec_iorb(iorb, 0, cmd_func(iorb, get_geometry));
1208}
1209
1210/******************************************************************************
1211 * Test whether unit is ready.
1212 */
1213void ahci_unit_ready(IORBH _far *iorb)
1214{
1215 ahci_exec_iorb(iorb, 0, cmd_func(iorb, unit_ready));
1216}
1217
1218/******************************************************************************
1219 * Read sectors from AHCI device.
1220 */
1221void ahci_read(IORBH _far *iorb)
1222{
1223 ahci_exec_iorb(iorb, 1, cmd_func(iorb, read));
1224}
1225
1226/******************************************************************************
1227 * Verify readability of sectors on AHCI device.
1228 */
1229void ahci_verify(IORBH _far *iorb)
1230{
1231 ahci_exec_iorb(iorb, 0, cmd_func(iorb, verify));
1232}
1233
1234/******************************************************************************
1235 * Write sectors to AHCI device.
1236 */
1237void ahci_write(IORBH _far *iorb)
1238{
1239 ahci_exec_iorb(iorb, 1, cmd_func(iorb, write));
1240}
1241
1242/******************************************************************************
1243 * Execute SCSI (ATAPI) command.
1244 */
1245void ahci_execute_cdb(IORBH _far *iorb)
1246{
1247 int a = iorb_unit_adapter(iorb);
1248 int p = iorb_unit_port(iorb);
1249 int d = iorb_unit_device(iorb);
1250
1251 if (ad_infos[a].ports[p].devs[d].atapi) {
1252 ahci_exec_iorb(iorb, 0, atapi_execute_cdb);
1253 } else {
1254 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1255 iorb_done(iorb);
1256 }
1257}
1258
1259/******************************************************************************
1260 * Execute ATA command.
1261 */
1262void ahci_execute_ata(IORBH _far *iorb)
1263{
1264 int a = iorb_unit_adapter(iorb);
1265 int p = iorb_unit_port(iorb);
1266 int d = iorb_unit_device(iorb);
1267
1268 if (ad_infos[a].ports[p].devs[d].atapi) {
1269 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1270 iorb_done(iorb);
1271 } else {
1272 ahci_exec_iorb(iorb, 0, ata_execute_ata);
1273 }
1274}
1275
1276/******************************************************************************
1277 * Execute polled ATA/ATAPI command. This function will block until the command
1278 * has completed or the timeout has expired, thus it should only be used during
1279 * initialization. Furthermore, it will always use command slot zero...
1280 */
1281static int exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...)
1282{
1283 va_list va;
1284 u8 _far *port_mmio = port_base(ai, p);
1285 u32 tmp;
1286 int rc;
1287
1288 /* verify that command slot 0 is idle */
1289 if (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
1290 ddprintf("port %d slot 0 is not idle; not executing polled cmd\n", p);
1291 return(-1);
1292 }
1293
1294 /* fill in command slot 0 */
1295 va_start(va, cmd);
1296 if ((rc = v_ata_cmd(ai, p, d, 0, cmd, va)) != 0) {
1297 return(rc);
1298 }
1299
1300 /* start command execution for slot 0 */
1301 ddprintf("executing polled cmd...");
1302 writel(port_mmio + PORT_CMD_ISSUE, 1);
1303
1304 /* wait until command has completed */
1305 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
1306 mdelay(10);
1307 timeout -= 10;
1308 }
1309 ddprintf(" done (time left = %d)\n", timeout);
1310
1311 /* check error condition */
1312 if ((tmp = readl(port_mmio + PORT_SCR_ERR)) != 0) {
1313 dprintf("SERR = 0x%08lx\n", tmp);
1314 return(-1);
1315 }
1316 if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
1317 dprintf("TFDATA = 0x%08lx\n", tmp);
1318 return(-1);
1319 }
1320
1321 return((timeout <= 0) ? -1 : 0);
1322}
1323
1324/******************************************************************************
1325 * Set up device attached to the specified port based on ATA_IDENTFY_DEVICE or
1326 * ATA_IDENTFY_PACKET_DEVICE data.
1327 *
1328 * NOTE: Port multipliers are not supported, yet, thus the device number is
1329 * expected to be 0 for the time being.
1330 */
1331static void ahci_setup_device(AD_INFO *ai, int p, int d, u16 *id_buf)
1332{
1333 DEVICESTRUCT ds;
1334 ADJUNCT adj;
1335 HDEVICE dh;
1336
1337 if (ai->port_max < p) {
1338 ai->port_max = p;
1339 }
1340 if (ai->ports[p].dev_max < d) {
1341 ai->ports[p].dev_max = d;
1342 }
1343 memset(ai->ports[p].devs + d, 0x00, sizeof(*ai->ports[p].devs));
1344
1345 /* set generic device information (assuming an ATA disk device for now) */
1346 ai->ports[p].devs[d].present = 1;
1347 ai->ports[p].devs[d].removable = (id_buf[ATA_ID_CONFIG] & 0x0080U) != 0;
1348 ai->ports[p].devs[d].dev_type = UIB_TYPE_DISK;
1349
1350 if (id_buf[ATA_ID_CONFIG] & 0x8000U) {
1351 /* this is an ATAPI device; augment device information */
1352 ai->ports[p].devs[d].atapi = 1;
1353 ai->ports[p].devs[d].atapi_16 = (id_buf[ATA_ID_CONFIG] & 0x0001U) != 0;
1354 ai->ports[p].devs[d].dev_type = (id_buf[ATA_ID_CONFIG] & 0x1f00U) >> 8;
1355
1356 } else {
1357 /* complete ATA-specific device information */
1358 ai->ports[p].devs[d].ncq_max = id_buf[ATA_ID_QUEUE_DEPTH] & 0x001fU;
1359 if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x40) {
1360 ai->ports[p].devs[d].lba48 = 1;
1361 }
1362 }
1363
1364 dprintf("found device %d.%d.%d: removable = %d, dev_type = %d, atapi = %d\n",
1365 ad_no(ai), p, d,
1366 ai->ports[p].devs[d].removable,
1367 ai->ports[p].devs[d].dev_type,
1368 ai->ports[p].devs[d].atapi);
1369
1370 /* add device to resource manager; we don't really care about errors here */
1371 memset(&ds, 0x00, sizeof(ds));
1372 memset(&adj, 0x00, sizeof(adj));
1373
1374 adj.pNextAdj = NULL;
1375 adj.AdjLength = sizeof(adj);
1376 adj.AdjType = ADJ_ADD_UNIT;
1377 adj.Add_Unit.ADDHandle = rm_drvh;
1378
1379 ds.DevDescriptName = ata_dev_name(id_buf);
1380 ds.DevFlags = (ai->ports[p].devs[d].removable) ? DS_REMOVEABLE_MEDIA
1381 : DS_FIXED_LOGICALNAME;
1382 ds.DevType = ai->ports[p].devs[d].dev_type;
1383
1384 RMCreateDevice(rm_drvh, &dh, &ds, ai->rm_adh, NULL);
1385
1386 /* try to detect virtualbox environment to enable a hack for IRQ routing */
1387 if (ai == ad_infos && p == 7 &&
1388 ai->pci->vendor == 0x8086 && ai->pci->device == 0x2829 &&
1389 !memcmp(ds.DevDescriptName, "VBOX HARDDISK", 13)) {
1390 /* running inside virtualbox */
1391 pci_hack_virtualbox();
1392 }
1393}
1394
1395/******************************************************************************
1396 * Timeout handler for I/O commands. Since timeout handling can involve
1397 * lengthy operations like port resets, the main code is located in a
1398 * separate function which is invoked via a context hook.
1399 */
1400static void _far timeout_callback(ULONG timer_handle, ULONG p1, ULONG p2)
1401{
1402 IORBH _far *iorb = (IORBH _far *) p1;
1403 int a = iorb_unit_adapter(iorb);
1404 int p = iorb_unit_port(iorb);
1405
1406 ADD_CancelTimer(timer_handle);
1407 dprintf("timeout for IORB %Fp\n", iorb);
1408
1409 /* Move the timed-out IORB to the abort queue. Since it's possible that the
1410 * IORB has completed after the timeout has expired but before we got to
1411 * this line of code, we'll check the return code of iorb_queue_del(): If it
1412 * returns an error, the IORB must have completed a few microseconds ago and
1413 * there is no timeout.
1414 */
1415 spin_lock(drv_lock);
1416 if (iorb_queue_del(&ad_infos[a].ports[p].iorb_queue, iorb) == 0) {
1417 iorb_queue_add(&abort_queue, iorb);
1418 iorb->ErrorCode = IOERR_ADAPTER_TIMEOUT;
1419 }
1420 spin_unlock(drv_lock);
1421
1422 /* Trigger abort processing function. We don't really care whether this
1423 * succeeds because the only reason why it would fail should be multiple
1424 * calls to DevHelp_ArmCtxHook() before the context hook had a chance to
1425 * start executing, which leaves two scenarios:
1426 *
1427 * - We succeded in arming the context hook. Fine.
1428 *
1429 * - We armed the context hook a second time before it had a chance to
1430 * start executing. In this case, the already scheduled context hook
1431 * will process our IORB as well.
1432 */
1433 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1434}
1435
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