source: trunk/src/ahci.c@ 9

Last change on this file since 9 was 9, checked in by root, 15 years ago

fixes for Watcom compiler
File size: 51.7 KB
Line 
1/******************************************************************************
2 * ahci.c - ahci hardware access functions
3 *
4 * Copyright (c) 2010 Christian Mueller. Parts copied from/inspired by the
5 * Linux AHCI driver; those parts are (c) Linux AHCI/ATA maintainers
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include "os2ahci.h"
23#include "ata.h"
24#include "atapi.h"
25
26/* -------------------------- macros and constants ------------------------- */
27
28/* produce ata/atapi function pointer with the given func name */
29#define cmd_func(iorb, func) ad_infos[iorb_unit_adapter(iorb)]. \
30 ports[iorb_unit_port(iorb)]. \
31 devs[iorb_unit_device(iorb)].atapi \
32 ? atapi_##func : ata_##func
33
34
35/* ------------------------ typedefs and structures ------------------------ */
36
37/* -------------------------- function prototypes -------------------------- */
38
39static void ahci_setup_device (AD_INFO *ai, int p, int d, u16 *id_buf);
40static void _far timeout_callback (ULONG timer_handle, ULONG p1, ULONG p2);
41
42/* ------------------------ global/static variables ------------------------ */
43
44/* Initial driver status flags indexed by the board_* constants in os2ahci.h
45 *
46 * NOTE: The Linux AHCI driver uses a combination of board-specific quirk
47 * flags and overriding certain libata service functions to handle
48 * adapter flaws. However, there were only three overrides at the time
49 * os2ahci was written, one for hard adapter resets and two for port
50 * resets, and we can easily implement those within the corresponding
51 * reset handlers. If this becomes more complex, this array of flags
52 * should be converted into a structure array which contains function
53 * pointers to all handler functions which may need to be overridden.
54 */
55u16 initial_flags[] = {
56 0, /* board_ahci */
57 AHCI_HFLAG_NO_NCQ | /* board_ahci_vt8251 */
58 AHCI_HFLAG_NO_PMP,
59 AHCI_HFLAG_IGN_IRQ_IF_ERR, /* board_ahci_ign_iferr */
60 AHCI_HFLAG_IGN_SERR_INTERNAL | /* board_ahci_sb600 */
61 AHCI_HFLAG_NO_MSI |
62 AHCI_HFLAG_SECT255 |
63 AHCI_HFLAG_32BIT_ONLY,
64 AHCI_HFLAG_NO_NCQ | /* board_ahci_mv */
65 AHCI_HFLAG_NO_MSI |
66 AHCI_HFLAG_MV_PATA |
67 AHCI_HFLAG_NO_PMP,
68 AHCI_HFLAG_IGN_SERR_INTERNAL, /* board_ahci_sb700 */
69 AHCI_HFLAG_YES_NCQ, /* board_ahci_mcp65 */
70 AHCI_HFLAG_NO_PMP, /* board_ahci_nopmp */
71 AHCI_HFLAG_YES_NCQ, /* board_ahci_yesncq */
72 AHCI_HFLAG_NO_SNTF, /* board_ahci_nosntf */
73};
74
75/* IRQ levels for stub interrupt handlers. OS/2 calls interrupt handlers
76 * without passing the IRQ level, yet it expects the interrupt handler to
77 * know the IRQ level for EOI processing. Thus we need multiple interrupt
78 * handlers, one for each IRQ, and some mapping from the interrupt handler
79 * index to the corresponding IRQ.
80 */
81static u16 irq_map[MAX_AD]; /* IRQ level for each stub IRQ func */
82static int irq_map_cnt; /* number of IRQ stub funcs used */
83
84/* ----------------------------- start of code ----------------------------- */
85
86/******************************************************************************
87 * Interrupt handlers. Those are stubs which call the real interrupt handler
88 * with the IRQ level as parameter. This mapping is required because OS/2
89 * calls interrupt handlers without any parameters, yet expects them to know
90 * which IRQ level to complete when calling DevHelp_EOI().
91 *
92 * This array of functions needs to be extended when increasing MAX_AD.
93 */
94#if MAX_AD > 8
95#error must extend irq_handler_xx and irq_handlers[] when increasing MAX_AD
96#endif
97
98/* Macro to call AHCI interrupt handler and set/clear carry flag accordingly.
99 * We need to set the carry flag if the interrupt was not handled. This is
100 * done by shifting the return value of ahci_intr() to the right, implying
101 * bit 0 will be set when the interrupt was not handled.
102 */
103#define call_ahci_intr(i) return(ahci_intr(irq_map[i]) >> 1)
104
105static USHORT _far irq_handler_00(void) { call_ahci_intr(0); }
106static USHORT _far irq_handler_01(void) { call_ahci_intr(1); }
107static USHORT _far irq_handler_02(void) { call_ahci_intr(2); }
108static USHORT _far irq_handler_03(void) { call_ahci_intr(3); }
109static USHORT _far irq_handler_04(void) { call_ahci_intr(4); }
110static USHORT _far irq_handler_05(void) { call_ahci_intr(5); }
111static USHORT _far irq_handler_06(void) { call_ahci_intr(6); }
112static USHORT _far irq_handler_07(void) { call_ahci_intr(7); }
113
114PFN irq_handlers[] = {
115 (PFN) irq_handler_00, (PFN) irq_handler_01, (PFN) irq_handler_02,
116 (PFN) irq_handler_03, (PFN) irq_handler_04, (PFN) irq_handler_05,
117 (PFN) irq_handler_06, (PFN) irq_handler_07
118};
119
120/******************************************************************************
121 * Save BIOS configuration of AHCI adapter. As a side effect, this also saves
122 * generic configuration information which we may have to restore after an
123 * adapter reset.
124 *
125 * NOTE: This function also saves working copies of the CAP and CAP2 registers
126 * as well as the initial port map in the AD_INFO structure after
127 * removing features which are known to cause trouble on this specific
128 * piece of hardware.
129 */
130int ahci_save_bios_config(AD_INFO *ai)
131{
132 int ports;
133 int i;
134
135 /* save BIOS configuration */
136 for (i = 0; i < HOST_CAP2; i += sizeof(u32)) {
137 ai->bios_config[i / sizeof(u32)] = readl(ai->mmio + i);
138 }
139
140 /* HOST_CAP2 only exists for AHCI V1.2 and later */
141 if (ai->bios_config[HOST_VERSION / sizeof(u32)] >= 0x00010200L) {
142 ai->bios_config[HOST_CAP2 / sizeof(u32)] = readl(ai->mmio + HOST_CAP2);
143 } else {
144 ai->bios_config[HOST_CAP2 / sizeof(u32)] = 0;
145 }
146
147 /* print AHCI register debug information */
148 if (debug) {
149 printf("AHCI global controller registers:\n");
150 for (i = 0; i <= HOST_CAP2 / sizeof(u32); i++) {
151 u32 val = ai->bios_config[i];
152 printf(" %02x: %08lx", i, val);
153
154 if (i == HOST_CAP) {
155 printf(" -");
156 if (val & HOST_CAP_64) printf(" 64bit");
157 if (val & HOST_CAP_NCQ) printf(" ncq");
158 if (val & HOST_CAP_SNTF) printf(" sntf");
159 if (val & HOST_CAP_MPS) printf(" mps");
160 if (val & HOST_CAP_SSS) printf(" sss");
161 if (val & HOST_CAP_ALPM) printf(" alpm");
162 if (val & HOST_CAP_LED) printf(" led");
163 if (val & HOST_CAP_CLO) printf(" clo");
164 if (val & HOST_CAP_ONLY) printf(" ahci_only");
165 if (val & HOST_CAP_PMP) printf(" pmp");
166 if (val & HOST_CAP_FBS) printf(" fbs");
167 if (val & HOST_CAP_PIO_MULTI) printf(" pio_multi");
168 if (val & HOST_CAP_SSC) printf(" ssc");
169 if (val & HOST_CAP_PART) printf(" part");
170 if (val & HOST_CAP_CCC) printf(" ccc");
171 if (val & HOST_CAP_EMS) printf(" ems");
172 if (val & HOST_CAP_SXS) printf(" sxs");
173 printf(" ports:%d", (val & 0x1f) + 1);
174
175 } else if (i == HOST_CTL) {
176 printf(" -");
177 if (val & HOST_AHCI_EN) printf(" ahci_enabled");
178 if (val & HOST_IRQ_EN) printf(" irq_enabled");
179 if (val & HOST_RESET) printf(" resetting");
180
181 } else if (i == HOST_CAP2) {
182 printf(" -");
183 if (val & HOST_CAP2_BOH) printf(" boh");
184 if (val & HOST_CAP2_NVMHCI) printf(" nvmhci");
185 if (val & HOST_CAP2_APST) printf(" apst");
186
187 }
188 printf("\n");
189 }
190 }
191
192 /* Save working copies of CAP, CAP2 and port_map and remove broken feature
193 * bits. This is largely copied from the Linux AHCI driver -- the wisdom
194 * around quirks and faulty hardware is hard to come by...
195 */
196 ai->cap = ai->bios_config[HOST_CAP / sizeof(u32)];
197 ai->cap2 = ai->bios_config[HOST_CAP2 / sizeof(u32)];
198 ai->port_map = ai->bios_config[HOST_PORTS_IMPL / sizeof(u32)];
199
200 if (ai->pci->board >= sizeof(initial_flags) / sizeof(*initial_flags)) {
201 dprintf("error: invalid board index in PCI info\n");
202 return(-1);
203 }
204 ai->flags = initial_flags[ai->pci->board];
205
206 if ((ai->cap & HOST_CAP_64) && (ai->flags & AHCI_HFLAG_32BIT_ONLY)) {
207 /* disable 64-bit support for faulty controllers; OS/2 can't do 64 bits at
208 * this point, of course, but who knows where all this will be in a few
209 * years...
210 */
211 ai->cap &= ~HOST_CAP_64;
212 }
213
214 if ((ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_NO_NCQ)) {
215 dprintf("controller can't do NCQ, turning off CAP_NCQ\n");
216 ai->cap &= ~HOST_CAP_NCQ;
217 }
218
219 if (!(ai->cap & HOST_CAP_NCQ) && (ai->flags & AHCI_HFLAG_YES_NCQ)) {
220 dprintf("controller can do NCQ, turning on CAP_NCQ\n");
221 ai->cap |= HOST_CAP_NCQ;
222 }
223
224 if ((ai->cap & HOST_CAP_PMP) && (ai->flags & AHCI_HFLAG_NO_PMP)) {
225 dprintf("controller can't do PMP, turning off CAP_PMP\n");
226 ai->cap |= HOST_CAP_PMP;
227 }
228
229 if ((ai->cap & HOST_CAP_SNTF) && (ai->flags & AHCI_HFLAG_NO_SNTF)) {
230 dprintf("controller can't do SNTF, turning off CAP_SNTF\n");
231 ai->cap &= ~HOST_CAP_SNTF;
232 }
233
234 if (ai->pci->vendor == PCI_VENDOR_ID_JMICRON &&
235 ai->pci->device == 0x2361 && ai->port_map != 1) {
236 dprintf("JMB361 has only one port, port_map 0x%x -> 0x%x\n", ai->port_map, 1);
237 ai->port_map = 1;
238 }
239
240 /* Correlate port map to number of ports reported in HOST_CAP
241 *
242 * NOTE: Port map and number of ports handling differs a bit from the
243 * Linux AHCI driver because we're storing both in AI_INFO. As in the
244 * Linux driver, the port map is the main driver for port scanning but
245 * we're also saving a maximum port number in AI_INFO to reduce the
246 * number of IORB queues to look at in trigger_engine(). This is done
247 * in ahci_scan_ports().
248 */
249 ports = (ai->cap & 0x1f) + 1;
250 for (i = 0; i < AHCI_MAX_PORTS; i++) {
251 if (ai->port_map & (1UL << i)) {
252 ports--;
253 }
254 }
255 if (ports < 0) {
256 /* more ports in port_map than in HOST_CAP & 0x1f */
257 ports = (ai->cap & 0x1f) + 1;
258 dprintf("implemented port map (0x%lx) contains more "
259 "ports than nr_ports (%d), using nr_ports\n",
260 ai->port_map, ports);
261 ai->port_map = (1UL << ports) - 1UL;
262 }
263
264 /* set maximum command slot number */
265 ai->cmd_max = (u16) ((ai->cap >> 8) & 0x1f);
266
267 return(0);
268}
269
270/******************************************************************************
271 * Restore BIOS configuration of AHCI adapter. This is needed after scanning
272 * for devices because we still need the BIOS until the initial boot sequence
273 * has completed.
274 */
275int ahci_restore_bios_config(AD_INFO *ai)
276{
277 ddprintf("restoring AHCI BIOS configuration\n");
278
279 /* restore saved BIOS configuration */
280 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
281 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
282 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
283 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
284
285 /* flush PCI MMIO delayed write buffers */
286 readl(ai->mmio + HOST_EM_CTL);
287
288 return(0);
289}
290
291/******************************************************************************
292 * Restore initial configuration (e.g. after an adapter reset). This relies
293 * on information saved by 'ahci_save_bios_config()'.
294 */
295int ahci_restore_initial_config(AD_INFO *ai)
296{
297 ddprintf("restoring initial configuration\n");
298
299 /* restore saved BIOS configuration */
300 writel(ai->mmio + HOST_CTL, ai->bios_config[HOST_CTL / sizeof(u32)]);
301 writel(ai->mmio + HOST_CCC, ai->bios_config[HOST_CCC / sizeof(u32)]);
302 writel(ai->mmio + HOST_CCC_PORTS, ai->bios_config[HOST_CCC_PORTS / sizeof(u32)]);
303 writel(ai->mmio + HOST_EM_CTL, ai->bios_config[HOST_EM_CTL / sizeof(u32)]);
304
305 /* flush PCI MMIO delayed write buffers */
306 readl(ai->mmio + HOST_EM_CTL);
307
308 /* (re-)enable AHCI mode */
309 ahci_enable_ahci(ai);
310
311 return(0);
312}
313
314/******************************************************************************
315 * Save port configuration. This is primarily used to save the BIOS port
316 * configuration (command list and FIS buffers and the IRQ mask).
317 *
318 * The port configuration returned by this function is dynamically allocated
319 * and automatically freed when calling ahci_restore_port_config().
320 */
321AHCI_PORT_CFG *ahci_save_port_config(AD_INFO *ai, int p)
322{
323 AHCI_PORT_CFG *pc;
324 u8 _far *port_mmio = port_base(ai, p);
325
326 if ((pc = malloc(sizeof(*pc))) == NULL) {
327 return(NULL);
328 }
329
330 pc->cmd_list = readl(port_mmio + PORT_LST_ADDR);
331 pc->cmd_list_h = readl(port_mmio + PORT_LST_ADDR_HI);
332 pc->fis_rx = readl(port_mmio + PORT_FIS_ADDR);
333 pc->fis_rx_h = readl(port_mmio + PORT_FIS_ADDR_HI);
334 pc->irq_mask = readl(port_mmio + PORT_IRQ_MASK);
335
336 return(pc);
337}
338
339/******************************************************************************
340 * Restore port configuration. This is primarily used to restore the BIOS port
341 * configuration (command list and FIS buffers and the IRQ mask).
342 *
343 * The port configuration automatically freed.
344 */
345void ahci_restore_port_config(AD_INFO *ai, int p, AHCI_PORT_CFG *pc)
346{
347 u8 _far *port_mmio = port_base(ai, p);
348
349 writel(port_mmio + PORT_LST_ADDR, pc->cmd_list);
350 writel(port_mmio + PORT_LST_ADDR_HI, pc->cmd_list_h);
351 writel(port_mmio + PORT_FIS_ADDR, pc->fis_rx);
352 writel(port_mmio + PORT_FIS_ADDR_HI, pc->fis_rx_h);
353 writel(port_mmio + PORT_IRQ_MASK, pc->irq_mask);
354
355 readl(port_base(ai, p) + PORT_IRQ_MASK); /* flush */
356
357 free(pc);
358}
359
360/******************************************************************************
361 * Enable AHCI mode on this controller.
362 */
363int ahci_enable_ahci(AD_INFO *ai)
364{
365 u32 ctl = readl(ai->mmio + HOST_CTL);
366 int i;
367
368 if (ctl & HOST_AHCI_EN) {
369 /* AHCI mode already enbled */
370 return(0);
371 }
372
373 /* some controllers need AHCI_EN to be written multiple times */
374 for (i = 0; i < 5; i++) {
375 ctl |= HOST_AHCI_EN;
376 writel(ai->mmio + HOST_CTL, ctl);
377 ctl = readl(ai->mmio + HOST_CTL); /* flush && sanity check */
378 if (ctl & HOST_AHCI_EN) {
379 return(0);
380 }
381 mdelay(10);
382 }
383
384 /* couldn't enable AHCI mode */
385 dprintf("failed to enable AHCI mode on adapter #%d\n", ad_no(ai));
386 return(1);
387}
388
389/******************************************************************************
390 * Scan all ports for connected devices and fill in the corresponding device
391 * information.
392 *
393 * NOTES:
394 *
395 * - The adapter is temporarily configured for os2ahci but the original BIOS
396 * configuration will be restored when done. This happens only until we
397 * have received the IOCC_COMPLETE_INIT command.
398 *
399 * - Subsequent calls are currently not planned but may be required for
400 * suspend/resume handling, hot swap functionality, etc.
401 *
402 * - This function is expected to be called with the spinlock released but
403 * the corresponding adapter's busy flag set. It will aquire the spinlock
404 * temporarily to allocate/free memory for the ATA identify buffer.
405 */
406int ahci_scan_ports(AD_INFO *ai)
407{
408 AHCI_PORT_CFG *pc = NULL;
409 u16 *id_buf;
410 int rc;
411 int p;
412
413 spin_lock(drv_lock);
414 id_buf = malloc(ATA_ID_WORDS * sizeof(u16));
415 spin_unlock(drv_lock);
416 if (id_buf == NULL) {
417 return(-1);
418 }
419
420 if (ai->bios_config[0] == 0) {
421 /* first call */
422 ahci_save_bios_config(ai);
423 }
424
425 if (ahci_enable_ahci(ai)) {
426 goto exit_port_scan;
427 }
428
429 /* perform port scan */
430 dprintf("scanning ports on adapter #%d\n", ad_no(ai));
431 for (p = 0; p < AHCI_MAX_PORTS; p++) {
432 if (ai->port_map & (1UL << p)) {
433
434 if (!init_complete) {
435 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
436 goto exit_port_scan;
437 }
438 }
439
440 /* start/reset port; if no device is attached, this is expected to fail */
441 if (init_reset) {
442 ddprintf("resetting port #%d\n", p);
443 rc = ahci_reset_port(ai, p, 0);
444 } else {
445 ddprintf("(re)starting port #%d\n", p);
446 ahci_stop_port(ai, p);
447 rc = ahci_start_port(ai, p, 0);
448 }
449 if (rc) {
450 /* no device attached to this port */
451 ai->port_map &= ~(1UL << p);
452 goto restore_port_config;
453 }
454
455 /* this port has a device attached and is ready to accept commands */
456 ddprintf("port #%d seems to be attached to a device; probing...\n", p);
457 rc = ahci_exec_polled_cmd(ai, p, 0, 500, ATA_CMD_ID_ATA,
458 AP_VADDR, (void _far *) id_buf, 512,
459 AP_END);
460
461 if (rc != 0 || id_buf[ATA_ID_CONFIG] & (1U << 15)) {
462 /* this might be an ATAPI device; run IDENTIFY_PACKET_DEVICE */
463 rc = ahci_exec_polled_cmd(ai, p, 0, 500, ATA_CMD_ID_ATAPI,
464 AP_VADDR, (void _far *) id_buf, 512,
465 AP_END);
466 }
467
468 if (rc == 0) {
469 /* we have a valid IDENTIFY or IDENTIFY_PACKET response */
470 ddphex(id_buf, 512, "ATA_IDENTIFY(_PACKET) results:\n");
471 ahci_setup_device(ai, p, 0, id_buf);
472 } else {
473 /* no device attached to this port */
474 ai->port_map &= ~(1UL << p);
475 }
476
477 restore_port_config:
478 if (pc != NULL) {
479 ahci_restore_port_config(ai, p, pc);
480 }
481 }
482 }
483
484exit_port_scan:
485 if (!init_complete) {
486 ahci_restore_bios_config(ai);
487 }
488 spin_lock(drv_lock);
489 free(id_buf);
490 spin_unlock(drv_lock);
491 return(0);
492}
493
494/******************************************************************************
495 * Complete initialization of adapter. This includes restarting all active
496 * ports and initializing interrupt processing. This is called when receiving
497 * the IOCM_COMPLETE_INIT request.
498 */
499int ahci_complete_init(AD_INFO *ai)
500{
501 int rc;
502 int p;
503 int i;
504
505 dprintf("completing initialization of adapter #%d\n", ad_no(ai));
506
507 /* register IRQ handlers; each IRQ level is registered only once */
508 for (i = 0; i < irq_map_cnt; i++) {
509 if (irq_map[i] == ai->irq) {
510 /* we already have this IRQ registered */
511 break;
512 }
513 }
514
515 if (i >= irq_map_cnt) {
516 dprintf("registering interrupt #%d\n", ai->irq);
517
518 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 1) != 0) {
519 dprintf("failed to register shared interrupt\n");
520
521 if (DevHelp_SetIRQ(mk_NPFN(irq_handlers[irq_map_cnt]), ai->irq, 0) != 0) {
522 dprintf("failed to register exclusive interrupt\n");
523 return(-1);
524 }
525 }
526 irq_map[irq_map_cnt++] = ai->irq;
527 }
528
529 /* enable AHCI mode */
530 if ((rc = ahci_enable_ahci(ai)) != 0) {
531 return(rc);
532 }
533
534 /* Start all ports. The main purpose is to set the command list and FIS
535 * receive area addresses properly and to enable port-level interrupts; we
536 * don't really care about the return status because we'll find out soon
537 * enough if a previously detected device has problems.
538 */
539 for (p = 0; p < AHCI_MAX_PORTS; p++) {
540 if (ai->port_map & (1UL << p)) {
541 dprintf("restarting port #%d\n", p);
542 ahci_stop_port(ai, p);
543 ahci_start_port(ai, p, 1);
544 }
545 }
546
547 /* enable adapter-level interrupts */
548 writel(ai->mmio + HOST_CTL, HOST_IRQ_EN);
549 readl(ai->mmio + HOST_CTL); /* flush */
550
551 /* enable interrupts on PCI-level (PCI 2.3 added a feature to disable ints) */
552 pci_enable_int(ai->bus, ai->dev_func);
553
554 return(0);
555}
556
557/******************************************************************************
558 * Reset specified port. This function is typically called during adapter
559 * initialization and first gets the port into a defined status, then resets
560 * the port by sending a COMRESET signal.
561 *
562 * This function is also the location of the link speed initialization (link
563 * needs to be restablished after changing link speed, anyway).
564 *
565 * NOTE: This function uses a busy loop to wait for DMA engines to stop and
566 * the COMRESET to complete. It should only be called at task time
567 * during initialization or in a context hook.
568 */
569int ahci_reset_port(AD_INFO *ai, int p, int ei)
570{
571 u8 _far *port_mmio = port_base(ai, p);
572 u32 tmp;
573 int timeout = 500;
574
575 dprintf("resetting port %d.%d\n", ad_no(ai), p);
576
577 /* stop port engines (we don't care whether there is an error doing so) */
578 ahci_stop_port(ai, p);
579
580 /* clear SError */
581 tmp = readl(port_mmio + PORT_SCR_ERR);
582 ddprintf(" PORT_SCR_ERR = 0x%lx\n", tmp);
583 writel(port_mmio + PORT_SCR_ERR, tmp);
584
585 /* clear pending port IRQs */
586 tmp = readl(port_mmio + PORT_IRQ_STAT);
587 if (tmp) {
588 writel(port_mmio + PORT_IRQ_STAT, tmp);
589 }
590 ddprintf(" PORT_IRQ_STAT = 0x%lx\n", tmp);
591 ddprintf(" PORT_IRQ_MASK = 0x%lx\n", readl(port_mmio + PORT_IRQ_MASK));
592 ddprintf(" HOST_IRQ_STAT = 0x%lx\n", readl(ai->mmio + HOST_IRQ_STAT));
593 writel(ai->mmio + HOST_IRQ_STAT, 1UL << p);
594
595 /* set link speed */
596 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x000000f0UL;
597 writel(port_mmio + PORT_SCR_CTL, tmp | (link_speed[ad_no(ai)][p] << 4));
598
599 /* issue COMRESET on the port */
600 tmp = readl(port_mmio + PORT_SCR_CTL) & ~0x0000000fUL;
601 writel(port_mmio + PORT_SCR_CTL, tmp | 1);
602 readl(port_mmio + PORT_SCR_CTL); /* flush */
603
604 /* spec says "leave reset bit on for at least 1ms"; make it 2ms */
605 mdelay(2);
606
607 writel(port_mmio + PORT_SCR_CTL, tmp);
608 readl(port_mmio + PORT_SCR_CTL); /* flush */
609
610 /* wait for communication to be re-established after port reset */
611 while (((tmp = readl(port_mmio + PORT_SCR_STAT) & 3)) != 3) {
612 mdelay(10);
613 timeout -= 10;
614 if (timeout <= 0) {
615 dprintf("no device present after resetting port #%d "
616 "(PORT_SCR_STAT = 0x%lx)\n", p, tmp);
617 return(-1);
618 }
619 }
620
621 /* clear SError again (recommended by AHCI spec) */
622 tmp = readl(port_mmio + PORT_SCR_ERR);
623 writel(port_mmio + PORT_SCR_ERR, tmp);
624
625 /* start port so we can receive the COMRESET FIS */
626 ahci_start_port(ai, p, ei);
627
628 /* wait for device to be ready ((PxTFD & (BSY | DRQ | ERR)) == 0) */
629 while (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
630 mdelay(10);
631 timeout -= 10;
632 if (timeout <= 0) {
633 dprintf("device not ready on port #%d "
634 "(PORT_TFDATA = 0x%lx)\n", p, tmp);
635 ahci_stop_port(ai, p);
636 return(-1);
637 }
638 }
639 ddprintf(" PORT_TFDATA = 0x%lx\n", readl(port_mmio + PORT_TFDATA));
640
641 return(0);
642}
643
644/******************************************************************************
645 * Start specified port.
646 */
647int ahci_start_port(AD_INFO *ai, int p, int ei)
648{
649 u8 _far *port_mmio = port_base(ai, p);
650 u32 status;
651
652 /* check whether device presence is detected and link established */
653 status = readl(port_mmio + PORT_SCR_STAT);
654 ddprintf(" PORT_SCR_STAT = 0x%lx\n", status);
655 if ((status & 0xf) != 3) {
656 return(-1);
657 }
658
659 /* enable FIS reception */
660 ahci_start_fis_rx(ai, p);
661
662 /* enable DMA */
663 ahci_start_engine(ai, p);
664
665 if (ei) {
666 /* enable port interrupts */
667 writel(port_mmio + PORT_IRQ_MASK, PORT_IRQ_TF_ERR |
668 PORT_IRQ_HBUS_ERR |
669 PORT_IRQ_HBUS_DATA_ERR |
670 PORT_IRQ_IF_ERR |
671 PORT_IRQ_OVERFLOW |
672 PORT_IRQ_BAD_PMP |
673 PORT_IRQ_UNK_FIS |
674 PORT_IRQ_SDB_FIS |
675 PORT_IRQ_D2H_REG_FIS);
676 } else {
677 writel(port_mmio + PORT_IRQ_MASK, 0);
678 }
679 readl(port_mmio + PORT_IRQ_MASK); /* flush */
680
681 return(0);
682}
683
684/******************************************************************************
685 * Start port FIS reception. Copied from Linux AHCI driver and adopted to
686 * OS2AHCI.
687 */
688void ahci_start_fis_rx(AD_INFO *ai, int p)
689{
690 u8 _far *port_mmio = port_base(ai, p);
691 u32 port_dma = port_dma_base_phys(ai, p);
692 u32 tmp;
693
694 /* set comand header and FIS address registers */
695 writel(port_mmio + PORT_LST_ADDR, port_dma + offsetof(AHCI_PORT_DMA, cmd_hdr));
696 writel(port_mmio + PORT_LST_ADDR_HI, 0);
697 writel(port_mmio + PORT_FIS_ADDR, port_dma + offsetof(AHCI_PORT_DMA, rx_fis));
698 writel(port_mmio + PORT_FIS_ADDR_HI, 0);
699
700 /* enable FIS reception */
701 tmp = readl(port_mmio + PORT_CMD);
702 tmp |= PORT_CMD_FIS_RX;
703 writel(port_mmio + PORT_CMD, tmp);
704
705 /* flush */
706 readl(port_mmio + PORT_CMD);
707}
708
709/******************************************************************************
710 * Start port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
711 */
712void ahci_start_engine(AD_INFO *ai, int p)
713{
714 u8 _far *port_mmio = port_base(ai, p);
715 u32 tmp;
716
717 /* start DMA */
718 tmp = readl(port_mmio + PORT_CMD);
719 tmp |= PORT_CMD_START;
720 writel(port_mmio + PORT_CMD, tmp);
721 readl(port_mmio + PORT_CMD); /* flush */
722}
723
724/******************************************************************************
725 * Stop specified port
726 */
727int ahci_stop_port(AD_INFO *ai, int p)
728{
729 u8 _far *port_mmio = port_base(ai, p);
730 int rc;
731
732 /* disable FIS reception */
733 if ((rc = ahci_stop_fis_rx(ai, p)) != 0) {
734 dprintf("error: failed to stop FIS receive (%d)\n", rc);
735 return(rc);
736 }
737
738 /* disable DMA */
739 if ((rc = ahci_stop_engine(ai, p)) != 0) {
740 dprintf("error: failed to stop port HW engine (%d)\n", rc);
741 return(rc);
742 }
743
744 /* reset PxSACT register (tagged command queues, not reset by COMRESET) */
745 writel(port_mmio + PORT_SCR_ACT, 0);
746 readl(port_mmio + PORT_SCR_ACT); /* flush */
747
748 return(0);
749}
750
751/******************************************************************************
752 * Stop port FIS reception. Copied from Linux AHCI driver and adopted to
753 * OS2AHCI.
754 *
755 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
756 * should only be called at task time during initialization or in a
757 * context hook (e.g. when resetting a port).
758 */
759int ahci_stop_fis_rx(AD_INFO *ai, int p)
760{
761 u8 _far *port_mmio = port_base(ai, p);
762 int timeout = 1000;
763 u32 tmp;
764
765 /* disable FIS reception */
766 tmp = readl(port_mmio + PORT_CMD);
767 tmp &= ~PORT_CMD_FIS_RX;
768 writel(port_mmio + PORT_CMD, tmp);
769
770 /* wait for completion, spec says 500ms, give it 1000 */
771 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_FIS_ON)) {
772 mdelay(10);
773 timeout -= 10;
774 }
775
776 return((timeout <= 0) ? -1 : 0);
777}
778
779/******************************************************************************
780 * Stop port HW engine. Copied from Linux AHCI driver and adopted to OS2AHCI.
781 *
782 * NOTE: This function uses a busy loop to wait for the DMA engine to stop. It
783 * should only be called at task time during initialization or in a
784 * context hook (e.g. when resetting a port).
785 */
786int ahci_stop_engine(AD_INFO *ai, int p)
787{
788 u8 _far *port_mmio = port_base(ai, p);
789 int timeout = 500;
790 u32 tmp;
791
792 tmp = readl(port_mmio + PORT_CMD);
793
794 /* check if the port is already stopped */
795 if ((tmp & (PORT_CMD_START | PORT_CMD_LIST_ON)) == 0) {
796 return 0;
797 }
798
799 /* set port to idle */
800 tmp &= ~PORT_CMD_START;
801 writel(port_mmio + PORT_CMD, tmp);
802
803 /* wait for engine to stop. This could be as long as 500 msec */
804 while (timeout > 0 && (readl(port_mmio + PORT_CMD) & PORT_CMD_LIST_ON)) {
805 mdelay(10);
806 timeout -= 10;
807 }
808
809 return((timeout <= 0) ? -1 : 0);
810}
811
812/******************************************************************************
813 * Execute AHCI command for given IORB. This includes all steps typically
814 * required by any of the ahci_*() IORB processing functions.
815 *
816 * NOTE: In order to prevent race conditions with port restart and reset
817 * handlers, we either need to keep the spinlock during the whole
818 * operation or set the adapter's busy flag. Since the expectation
819 * is that command preparation will be quick (it certainly doesn't
820 * involve delays), we're going with the spinlock for the time being.
821 */
822void ahci_exec_iorb(IORBH _far *iorb, int ncq_capable,
823 int (*func)(IORBH _far *, int))
824{
825 volatile u32 *cmds;
826 ADD_WORKSPACE _far *aws = add_workspace(iorb);
827 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
828 P_INFO *port = ai->ports + iorb_unit_port(iorb);
829 ULONG timeout = (iorb->Timeout > 0) ? iorb->Timeout : DEFAULT_TIMEOUT;
830 u8 _far *port_mmio = port_base(ai, iorb_unit_port(iorb));
831 int i;
832
833 /* determine whether this will be an NCQ request */
834 aws->is_ncq = ((ai->cap & HOST_CAP_NCQ) && ncq_capable && !aws->no_ncq);
835
836 /* NCQ disabled temporarily until non-NCQ commands are fully working */
837 aws->is_ncq = 0;
838
839 /* check whether adapter is available */
840 spin_lock(drv_lock);
841 if (!ai->busy) {
842
843 if (!init_complete) {
844 ai->busy = 1;
845 spin_unlock(drv_lock);
846 ahci_exec_polled_iorb(iorb, func, timeout);
847 ai->busy = 0;
848 return;
849 }
850
851 /* prevent NCQ/regular command mix */
852 if (aws->is_ncq && port->reg_cmds == 0 ||
853 !aws->is_ncq && port->ncq_cmds == 0) {
854
855 /* Find next available command slot. We use a simple round-robin
856 * algorithm for this to prevent commands with higher slot indexes
857 * from stalling when new commands are coming in frequently.
858 */
859 cmds = (aws->is_ncq) ? &port->ncq_cmds : &port->reg_cmds;
860 for (i = 0; i <= ai->cmd_max; i++) {
861 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
862 break;
863 }
864 if (++(port->cmd_slot) > ai->cmd_max) {
865 port->cmd_slot = 0;
866 }
867 }
868
869 if ((*cmds & (1UL << port->cmd_slot)) == 0) {
870 /* prepare command */
871 if (func(iorb, port->cmd_slot)) {
872 /* Command preparation failed, or no HW command required; IORB
873 * will already have the error code if there was an error.
874 */
875 spin_unlock(drv_lock);
876 iorb_done(iorb);
877 return;
878 }
879
880 /* start timer for this IORB */
881 ADD_StartTimerMS(&aws->timer, timeout, (PFN) timeout_callback, iorb, 0);
882
883 /* update IORB */
884 aws->queued_hw = 1;
885 aws->cmd_slot = port->cmd_slot;
886
887 /* issue command to hardware */
888 ddprintf("issuing command on slot %d\n", port->cmd_slot);
889 *cmds |= (1UL << port->cmd_slot);
890 if (aws->is_ncq) {
891 writel(port_mmio + PORT_SCR_ACT, (1UL << port->cmd_slot));
892 readl(port_mmio + PORT_SCR_ACT); /* flush */
893 }
894 writel(port_mmio + PORT_CMD_ISSUE, (1UL << port->cmd_slot));
895 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
896
897 /* make sure next cmd won't use the same slot to prevent starvation */
898 if (++(port->cmd_slot) > ai->cmd_max) {
899 port->cmd_slot = 0;
900 }
901 spin_unlock(drv_lock);
902 return;
903 }
904 }
905 }
906
907 /* requeue this IORB; it will be picked up again in trigger_engine() */
908 aws->processing = 0;
909 spin_unlock(drv_lock);
910}
911
912/******************************************************************************
913 * Execute polled IORB command. This function is called by ahci_exec_iorb()
914 * when the initialization has not yet completed. The reasons for polling until
915 * initialization has completed are:
916 *
917 * - We need to restore the BIOS configuration after we're done with this
918 * command because someone might still call int 13 routines; sending
919 * asynchronous commands and waiting for interrupts to indicate completion
920 * won't work in such a scenario.
921 * - Our context hooks won't work while the device managers are initializing
922 * (they can't yield at init time).
923 * - The device managers typically poll for command completion during
924 * initialization so it won't make much of a difference, anyway.
925 *
926 * NOTE: This function must be called with the adapter-level busy flag set but
927 * without the driver-level spinlock held.
928 */
929void ahci_exec_polled_iorb(IORBH _far *iorb, int (*func)(IORBH _far *, int),
930 ULONG timeout)
931{
932 AHCI_PORT_CFG *pc = NULL;
933 AD_INFO *ai = ad_infos + iorb_unit_adapter(iorb);
934 int p = iorb_unit_port(iorb);
935 u8 _far *port_mmio = port_base(ai, p);
936
937 /* enable AHCI mode */
938 if (ahci_enable_ahci(ai) != 0) {
939 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
940 goto restore_bios_config;
941 }
942
943 /* check whether command slot 0 is available */
944 if ((readl(port_mmio + PORT_CMD_ISSUE) & 1) != 0) {
945 iorb_seterr(iorb, IOERR_DEVICE_BUSY);
946 goto restore_bios_config;
947 }
948
949 /* save port configuration */
950 if ((pc = ahci_save_port_config(ai, p)) == NULL) {
951 iorb_seterr(iorb, IOERR_CMD_SW_RESOURCE);
952 goto restore_bios_config;
953 }
954
955 /* restart port (includes the necessary port configuration) */
956 if (ahci_stop_port(ai, p) || ahci_start_port(ai, p, 0)) {
957 iorb_seterr(iorb, IOERR_ADAPTER_NONSPECIFIC);
958 goto restore_bios_config;
959 }
960
961 /* prepare command */
962 if (func(iorb, 0) == 0) {
963 /* successfully prepared cmd; issue cmd and wait for completion */
964 ddprintf("executing polled cmd...");
965 writel(port_mmio + PORT_CMD_ISSUE, 1);
966 timeout /= 10;
967 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
968 mdelay(10);
969 timeout--;
970 }
971 ddprintf(" done (time left = %ld)\n", timeout * 10);
972
973 if (timeout == 0) {
974 dprintf("timeout for IORB %Fp\n", iorb);
975 iorb_seterr(iorb, IOERR_ADAPTER_TIMEOUT);
976
977 } else if (readl(port_mmio + PORT_SCR_ERR) != 0 ||
978 readl(port_mmio + PORT_TFDATA) & 0x89) {
979 dprintf("polled cmd error for IORB %Fp\n", iorb);
980 iorb_seterr(iorb, IOERR_DEVICE_NONSPECIFIC);
981 ahci_reset_port(ai, iorb_unit_port(iorb), 0);
982
983 } else {
984 /* successfully executed command */
985 if (add_workspace(iorb)->ppfunc != NULL) {
986 add_workspace(iorb)->ppfunc(iorb);
987 } else {
988 add_workspace(iorb)->complete = 1;
989 }
990 }
991 }
992
993restore_bios_config:
994 /* restore BIOS configuration */
995 if (pc != NULL) {
996 ahci_restore_port_config(ai, p, pc);
997 }
998 ahci_restore_bios_config(ai);
999
1000 if (add_workspace(iorb)->complete | (iorb->Status | IORB_ERROR)) {
1001 aws_free(add_workspace(iorb));
1002 iorb_done(iorb);
1003 }
1004 return;
1005}
1006
1007/******************************************************************************
1008 * Execute polled ATA/ATAPI command. This function will block until the command
1009 * has completed or the timeout has expired, thus it should only be used during
1010 * initialization. Furthermore, it will always use command slot zero.
1011 *
1012 * The difference to ahci_exec_polled_iorb() is that this function executes
1013 * arbitrary ATA/ATAPI commands outside the context of an IORB. It's typically
1014 * used when scanning for devices during initialization.
1015 */
1016int ahci_exec_polled_cmd(AD_INFO *ai, int p, int d, int timeout, int cmd, ...)
1017{
1018 va_list va;
1019 u8 _far *port_mmio = port_base(ai, p);
1020 u32 tmp;
1021 int rc;
1022
1023 /* verify that command slot 0 is idle */
1024 if (readl(port_mmio + PORT_CMD_ISSUE) & 1) {
1025 ddprintf("port %d slot 0 is not idle; not executing polled cmd\n", p);
1026 return(-1);
1027 }
1028
1029 /* fill in command slot 0 */
1030 va_start(va, cmd);
1031 if ((rc = v_ata_cmd(ai, p, d, 0, cmd, va)) != 0) {
1032 return(rc);
1033 }
1034
1035 /* start command execution for slot 0 */
1036 ddprintf("executing polled cmd...");
1037 writel(port_mmio + PORT_CMD_ISSUE, 1);
1038
1039 /* wait until command has completed */
1040 while (timeout > 0 && (readl(port_mmio + PORT_CMD_ISSUE) & 1)) {
1041 mdelay(10);
1042 timeout -= 10;
1043 }
1044 ddprintf(" done (time left = %d)\n", timeout);
1045
1046 /* check error condition */
1047 if ((tmp = readl(port_mmio + PORT_SCR_ERR)) != 0) {
1048 dprintf("SERR = 0x%08lx\n", tmp);
1049 return(-1);
1050 }
1051 if (((tmp = readl(port_mmio + PORT_TFDATA)) & 0x89) != 0) {
1052 dprintf("TFDATA = 0x%08lx\n", tmp);
1053 return(-1);
1054 }
1055
1056 return((timeout <= 0) ? -1 : 0);
1057}
1058
1059/******************************************************************************
1060 * AHCI top-level hardware interrupt handler. This handler finds the adapters
1061 * and ports which have issued the interrupt and calls the corresponding
1062 * port interrupt handler.
1063 *
1064 * On entry, OS/2 will have processor interrupts enabled because we're using
1065 * shared IRQs but we won't be preempted by another interrupt on the same IRQ
1066 * IRQ level until we indicated EOI. We'll keep it this way, only requesting
1067 * the driver-level spinlock when actually changing the driver state (IORB
1068 * queues, ...)
1069 */
1070int ahci_intr(u16 irq)
1071{
1072 u32 irq_stat;
1073 int handled = 0;
1074 int a;
1075 int p;
1076
1077 /* find adapter(s) with pending interrupts */
1078 for (a = 0; a < ad_info_cnt; a++) {
1079 AD_INFO *ai = ad_infos + a;
1080
1081 if (ai->irq == irq && (irq_stat = readl(ai->mmio + HOST_IRQ_STAT)) != 0) {
1082 /* this adapter has interrupts pending */
1083 u32 irq_masked = irq_stat & ai->port_map;
1084
1085 for (p = 0; p <= ai->port_max; p++) {
1086 if (irq_masked & (1UL << p)) {
1087 ahci_port_intr(ai, p);
1088 }
1089 }
1090
1091 /* clear interrupt condition on the adapter */
1092 writel(ai->mmio + HOST_IRQ_STAT, irq_stat);
1093 readl(ai->mmio + HOST_IRQ_STAT); /* flush */
1094 handled = 1;
1095 }
1096 }
1097
1098 if (handled) {
1099 /* trigger state machine to process next IORBs, if any */
1100 spin_lock(drv_lock);
1101 trigger_engine();
1102 spin_unlock(drv_lock);
1103
1104 /* complete the interrupt */
1105 DevHelp_EOI(irq);
1106 return(0);
1107 } else {
1108 return(1);
1109 }
1110}
1111
1112/******************************************************************************
1113 * AHCI port-level interrupt handler. As described above, processor interrupts
1114 * are enabled on entry thus we have to protect shared resources with a
1115 * spinlock.
1116 */
1117void ahci_port_intr(AD_INFO *ai, int p)
1118{
1119 IORB_QUEUE done_queue;
1120 IORBH _far *iorb;
1121 IORBH _far *next = NULL;
1122 u8 _far *port_mmio = port_base(ai, p);
1123 u32 irq_stat;
1124 u32 active_cmds;
1125 u32 done_mask;
1126
1127 ddprintf("port interrupt for adapter #%d, port #%d\n", ad_no(ai), p);
1128 memset(&done_queue, 0x00, sizeof(done_queue));
1129
1130 /* get interrupt status and clear it right away */
1131 irq_stat = readl(port_mmio + PORT_IRQ_STAT);
1132 writel(port_mmio + PORT_IRQ_STAT, irq_stat);
1133 readl(port_mmio + PORT_IRQ_STAT); /* flush */
1134
1135 if (irq_stat & PORT_IRQ_ERROR) {
1136 /* this is an error interrupt */
1137 ahci_error_intr(ai, p, irq_stat);
1138 return;
1139 }
1140
1141 spin_lock(drv_lock);
1142
1143 /* Find out which command slots have completed. Since error recovery for
1144 * NCQ commands interfers with non-NCQ commands, the upper layers will
1145 * make sure there's never a mixture of NCQ and non-NCQ commands active
1146 * on any port at any given time. This makes it easier to find out which
1147 * commands have completed, too.
1148 */
1149 if (ai->ports[p].ncq_cmds != 0) {
1150 active_cmds = readl(port_mmio + PORT_SCR_ACT);
1151 done_mask = ai->ports[p].ncq_cmds ^ active_cmds;
1152 ddprintf("[ncq_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1153 active_cmds, done_mask);
1154 } else {
1155 active_cmds = readl(port_mmio + PORT_CMD_ISSUE);
1156 done_mask = ai->ports[p].reg_cmds ^ active_cmds;
1157 ddprintf("[reg_cmds]: active_cmds = 0x%08lx, done_mask = 0x%08lx\n",
1158 active_cmds, done_mask);
1159 }
1160
1161 /* Find the IORBs related to the completed commands and complete them.
1162 *
1163 * NOTES: The spinlock must not be released while in this loop to prevent
1164 * race conditions with timeout handlers or other threads in SMP
1165 * systems.
1166 *
1167 * Since we hold the spinlock when IORBs complete, we can't call the
1168 * IORB notification routine right away because this routine might
1169 * schedule another IORB which could cause a deadlock. Thus, we'll
1170 * add all IORBs to be completed to a temporary queue which will be
1171 * processed after releasing the spinlock.
1172 */
1173 for (iorb = ai->ports[p].iorb_queue.root; iorb != NULL; iorb = next) {
1174 ADD_WORKSPACE _far *aws = (ADD_WORKSPACE _far *) &iorb->ADDWorkSpace;
1175 next = iorb->pNxtIORB;
1176 if (aws->queued_hw && (done_mask & (1UL << aws->cmd_slot))) {
1177 /* this command has completed */
1178 if (aws->ppfunc != NULL) {
1179 aws->ppfunc(iorb);
1180 } else {
1181 aws->complete = 1;
1182 }
1183
1184 if (aws->complete) {
1185 /* this IORB is complete */
1186 aws_free(aws);
1187
1188 /* move IORB to our temporary done queue */
1189 iorb_queue_del(&ai->ports[p].iorb_queue, iorb);
1190 iorb_queue_add(&done_queue, iorb);
1191 }
1192
1193 /* clear corresponding bit in issued command bitmaps */
1194 ai->ports[p].ncq_cmds &= ~(1UL << aws->cmd_slot);
1195 ai->ports[p].reg_cmds &= ~(1UL << aws->cmd_slot);
1196 }
1197 }
1198
1199 spin_unlock(drv_lock);
1200
1201 /* call notification routines for all IORBs in the done queue */
1202 for (iorb = done_queue.root; iorb != NULL; iorb = next) {
1203 next = iorb->pNxtIORB;
1204 iorb->Status = IORB_DONE;
1205 if (iorb->RequestControl & IORB_ASYNC_POST) {
1206 iorb->NotifyAddress(iorb);
1207 }
1208 }
1209}
1210
1211/******************************************************************************
1212 * AHCI error interrupt handler. Errors include interface errors and device
1213 * errors (usually triggered by the error bit in the AHCI task file register).
1214 *
1215 * Since this involves long-running operations such as restarting or even
1216 * resetting a port, this function is invoked at task time via a context
1217 * hook.
1218 *
1219 * NOTE: AHCI controllers stop all processing when encountering an error
1220 * condition in order to give the driver time to find out what exactly
1221 * went wrong. This means no new commands will be processed until we
1222 * clear the error register and restore the "commands issued" register.
1223 */
1224void ahci_error_intr(AD_INFO *ai, int p, u32 irq_stat)
1225{
1226 u8 _far *port_mmio = port_base(ai, p);
1227 int reset_port = 0;
1228
1229 /* Handle adapter and interface errors. Those typically require a port
1230 * reset, or worse.
1231 */
1232 if (irq_stat & PORT_IRQ_UNK_FIS) {
1233 u32 _far *unk = (u32 _far *) (port_dma_base(ai, p)->rx_fis + RX_FIS_UNK);
1234 dprintf("warning: unknown FIS %08lx %08lx %08lx %08lx\n",
1235 unk[0], unk[1], unk[2], unk[3]);
1236 reset_port = 1;
1237 }
1238 if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) {
1239 dprintf("warning: host bus [data] error for port #%d\n", p);
1240 reset_port = 1;
1241 }
1242 if (irq_stat & PORT_IRQ_IF_ERR && !(ai->flags & AHCI_HFLAG_IGN_IRQ_IF_ERR)) {
1243 dprintf("warning: interface fatal error for port #%d\n", p);
1244 reset_port = 1;
1245 }
1246 if (reset_port) {
1247 /* need to reset the port; leave this to the reset context hook */
1248 ports_to_reset[ad_no(ai)] |= 1UL << p;
1249 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1250
1251 /* no point analyzing device errors after a reset... */
1252 return;
1253 }
1254
1255 /* Handle device-specific errors. Those errors typically involve restarting
1256 * the corresponding port to resume operations which can take some time,
1257 * thus we need to offload this functionality to the restart context hook.
1258 */
1259 if (irq_stat & PORT_IRQ_TF_ERR) {
1260 ports_to_restart[ad_no(ai)] |= 1UL << p;
1261 DevHelp_ArmCtxHook(0, restart_ctxhook_h);
1262 }
1263}
1264
1265/******************************************************************************
1266 * Get device or media geometry. Device and media geometry are expected to be
1267 * the same for non-removable devices.
1268 */
1269void ahci_get_geometry(IORBH _far *iorb)
1270{
1271 dprintf("ahci_get_geometry(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
1272 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1273
1274 ahci_exec_iorb(iorb, 0, cmd_func(iorb, get_geometry));
1275}
1276
1277/******************************************************************************
1278 * Test whether unit is ready.
1279 */
1280void ahci_unit_ready(IORBH _far *iorb)
1281{
1282 dprintf("ahci_unit_ready(%d.%d.%d)\n", (int) iorb_unit_adapter(iorb),
1283 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1284
1285 ahci_exec_iorb(iorb, 0, cmd_func(iorb, unit_ready));
1286}
1287
1288/******************************************************************************
1289 * Read sectors from AHCI device.
1290 */
1291void ahci_read(IORBH _far *iorb)
1292{
1293 dprintf("ahci_read(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1294 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1295 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1296 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1297
1298 ahci_exec_iorb(iorb, 1, cmd_func(iorb, read));
1299}
1300
1301/******************************************************************************
1302 * Verify readability of sectors on AHCI device.
1303 */
1304void ahci_verify(IORBH _far *iorb)
1305{
1306 dprintf("ahci_verify(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1307 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1308 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1309 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1310
1311 ahci_exec_iorb(iorb, 0, cmd_func(iorb, verify));
1312}
1313
1314/******************************************************************************
1315 * Write sectors to AHCI device.
1316 */
1317void ahci_write(IORBH _far *iorb)
1318{
1319 dprintf("ahci_write(%d.%d.%d, %ld, %ld)\n", (int) iorb_unit_adapter(iorb),
1320 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb),
1321 (long) ((IORB_EXECUTEIO _far *) iorb)->RBA,
1322 (long) ((IORB_EXECUTEIO _far *) iorb)->BlockCount);
1323
1324 ahci_exec_iorb(iorb, 1, cmd_func(iorb, write));
1325}
1326
1327/******************************************************************************
1328 * Execute SCSI (ATAPI) command.
1329 */
1330void ahci_execute_cdb(IORBH _far *iorb)
1331{
1332 int a = iorb_unit_adapter(iorb);
1333 int p = iorb_unit_port(iorb);
1334 int d = iorb_unit_device(iorb);
1335
1336 dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
1337 ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
1338 "ahci_execute_cdb(%d.%d.%d)", (int) iorb_unit_adapter(iorb),
1339 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1340
1341 if (ad_infos[a].ports[p].devs[d].atapi) {
1342 ahci_exec_iorb(iorb, 0, atapi_execute_cdb);
1343 } else {
1344 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1345 iorb_done(iorb);
1346 }
1347}
1348
1349/******************************************************************************
1350 * Execute ATA command.
1351 */
1352void ahci_execute_ata(IORBH _far *iorb)
1353{
1354 int a = iorb_unit_adapter(iorb);
1355 int p = iorb_unit_port(iorb);
1356 int d = iorb_unit_device(iorb);
1357
1358 dphex(((IORB_ADAPTER_PASSTHRU _far *) iorb)->pControllerCmd,
1359 ((IORB_ADAPTER_PASSTHRU _far *) iorb)->ControllerCmdLen,
1360 "ahci_execute_cdb(%d.%d.%d)", (int) iorb_unit_adapter(iorb),
1361 (int) iorb_unit_port(iorb), (int) iorb_unit_device(iorb));
1362
1363 if (ad_infos[a].ports[p].devs[d].atapi) {
1364 iorb_seterr(iorb, IOERR_CMD_NOT_SUPPORTED);
1365 iorb_done(iorb);
1366 } else {
1367 ahci_exec_iorb(iorb, 0, ata_execute_ata);
1368 }
1369}
1370
1371/******************************************************************************
1372 * Set up device attached to the specified port based on ATA_IDENTFY_DEVICE or
1373 * ATA_IDENTFY_PACKET_DEVICE data.
1374 *
1375 * NOTE: Port multipliers are not supported, yet, thus the device number is
1376 * expected to be 0 for the time being.
1377 */
1378static void ahci_setup_device(AD_INFO *ai, int p, int d, u16 *id_buf)
1379{
1380 DEVICESTRUCT ds;
1381 ADJUNCT adj;
1382 HDEVICE dh;
1383
1384 if (ai->port_max < p) {
1385 ai->port_max = p;
1386 }
1387 if (ai->ports[p].dev_max < d) {
1388 ai->ports[p].dev_max = d;
1389 }
1390 memset(ai->ports[p].devs + d, 0x00, sizeof(*ai->ports[p].devs));
1391
1392 /* set generic device information (assuming an ATA disk device for now) */
1393 ai->ports[p].devs[d].present = 1;
1394 ai->ports[p].devs[d].removable = (id_buf[ATA_ID_CONFIG] & 0x0080U) != 0;
1395 ai->ports[p].devs[d].dev_type = UIB_TYPE_DISK;
1396
1397 if (id_buf[ATA_ID_CONFIG] & 0x8000U) {
1398 /* this is an ATAPI device; augment device information */
1399 ai->ports[p].devs[d].atapi = 1;
1400 ai->ports[p].devs[d].atapi_16 = (id_buf[ATA_ID_CONFIG] & 0x0001U) != 0;
1401 ai->ports[p].devs[d].dev_type = (id_buf[ATA_ID_CONFIG] & 0x1f00U) >> 8;
1402
1403 } else {
1404 /* complete ATA-specific device information */
1405 ai->ports[p].devs[d].ncq_max = id_buf[ATA_ID_QUEUE_DEPTH] & 0x001fU;
1406 if (id_buf[ATA_ID_CFS_ENABLE_2] & 0x40) {
1407 ai->ports[p].devs[d].lba48 = 1;
1408 }
1409 }
1410
1411 dprintf("found device %d.%d.%d: removable = %d, dev_type = %d, atapi = %d\n",
1412 ad_no(ai), p, d,
1413 ai->ports[p].devs[d].removable,
1414 ai->ports[p].devs[d].dev_type,
1415 ai->ports[p].devs[d].atapi);
1416
1417 /* add device to resource manager; we don't really care about errors here */
1418 memset(&ds, 0x00, sizeof(ds));
1419 memset(&adj, 0x00, sizeof(adj));
1420
1421 adj.pNextAdj = NULL;
1422 adj.AdjLength = sizeof(adj);
1423 adj.AdjType = ADJ_ADD_UNIT;
1424 adj.Add_Unit.ADDHandle = rm_drvh;
1425
1426 ds.DevDescriptName = ata_dev_name(id_buf);
1427 ds.DevFlags = (ai->ports[p].devs[d].removable) ? DS_REMOVEABLE_MEDIA
1428 : DS_FIXED_LOGICALNAME;
1429 ds.DevType = ai->ports[p].devs[d].dev_type;
1430
1431 RMCreateDevice(rm_drvh, &dh, &ds, ai->rm_adh, NULL);
1432
1433 /* try to detect virtualbox environment to enable a hack for IRQ routing */
1434 if (ai == ad_infos && p == 7 &&
1435 ai->pci->vendor == 0x8086 && ai->pci->device == 0x2829 &&
1436 !memcmp(ds.DevDescriptName, "VBOX HARDDISK", 13)) {
1437 /* running inside virtualbox */
1438 pci_hack_virtualbox();
1439 }
1440}
1441
1442/******************************************************************************
1443 * Timeout handler for I/O commands. Since timeout handling can involve
1444 * lengthy operations like port resets, the main code is located in a
1445 * separate function which is invoked via a context hook.
1446 */
1447static void _far timeout_callback(ULONG timer_handle, ULONG p1, ULONG p2)
1448{
1449 IORBH _far *iorb = (IORBH _far *) p1;
1450 int a = iorb_unit_adapter(iorb);
1451 int p = iorb_unit_port(iorb);
1452
1453 ADD_CancelTimer(timer_handle);
1454 dprintf("timeout for IORB %Fp\n", iorb);
1455
1456 /* Move the timed-out IORB to the abort queue. Since it's possible that the
1457 * IORB has completed after the timeout has expired but before we got to
1458 * this line of code, we'll check the return code of iorb_queue_del(): If it
1459 * returns an error, the IORB must have completed a few microseconds ago and
1460 * there is no timeout.
1461 */
1462 spin_lock(drv_lock);
1463 if (iorb_queue_del(&ad_infos[a].ports[p].iorb_queue, iorb) == 0) {
1464 iorb_queue_add(&abort_queue, iorb);
1465 iorb->ErrorCode = IOERR_ADAPTER_TIMEOUT;
1466 }
1467 spin_unlock(drv_lock);
1468
1469 /* Trigger abort processing function. We don't really care whether this
1470 * succeeds because the only reason why it would fail should be multiple
1471 * calls to DevHelp_ArmCtxHook() before the context hook had a chance to
1472 * start executing, which leaves two scenarios:
1473 *
1474 * - We succeded in arming the context hook. Fine.
1475 *
1476 * - We armed the context hook a second time before it had a chance to
1477 * start executing. In this case, the already scheduled context hook
1478 * will process our IORB as well.
1479 */
1480 DevHelp_ArmCtxHook(0, reset_ctxhook_h);
1481}
1482
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