skip to main content
10.1145/55364.55365acmconferencesArticle/Chapter ViewAbstractPublication PagesicsConference Proceedingsconference-collections
Article
Free access

Page table management in local/remote architectures

Published: 01 June 1988 Publication History

Abstract

We conjecture that a paged memory with page migration by the operating system may be an effective system environment for a local/remote shared memory architecture executing a single parallel computation. Implementing a paged memory in such an architecture raises several issues with respect to page table management. These issues include page table placement, page table replication level, and page table storage overhead. We discuss these issues, propose alternative solutions, and present an experimental evaluation of the solutions.
The experiments were conducted using software implemented page tables on a 32-node BBN Butterfly. The experiments have investigated the case of a single shared-memory parallel computation with one user process per processor. The implementation captures the costs of page table entry locking and reference information updating. Each user process has a copy of the computation's code and non-shared variables in local memory. Only shared data references use the page tables. A separate processor has a migration daemon that periodically unblocks itself and examines the page tables to make policy decisions concerning page migration.
The conclusions drawn include that: 1) a fully replicated page-indexed page table significantly reduces network, memory, and lock contention in comparison to a single copy, 2) a fully replicated page-indexed page table faces a severe memory utilization problem in large-scale architectures, 3) a proposed approach based on inverted page tables appears to be a promising alternative to a fully replicated page-indexed page table.

References

[1]
BBN. Butterfly Parallel Processor Overview. Bolt Beranek and Newman Adv. Computers Inc., Cambridge, MA, June 1985.
[2]
F., Darema-Rogers, G.F. Pfister, and K. So. Memory access patterns of parallel scientific programs. In Proceedings of the 1987 A CM gigmetrics Conference on Measurement and Modeling of Computer Systems, pages 46-58, May 1987.
[3]
M.D. Hill etal. Spur: a vlsi multiproeessor workstation. IEEE Computer, November 1985.
[4]
D. C~jskl, D. Kuck, D. Lawrie, and A. Sarneh. Cedar--a large scale multiprocessor. In Proceedings of the 1983 International Conference on Parallel Processing, pages 524- 529, August 1983.
[5]
K. Li and P. Hudak. Memory coherence in shared virtual memory systems. In Proceedings of the Fifth A CM Symposium on Principles of Distributed Computing, pages 229- 239, 1986.
[6]
M.N. Nelson. Virtual Memory for the Sprite Operating System. Technical Report UCB/CSD/86/301, Computer Science Division, Univ. California Berkeley, June 1986.
[7]
G. Pfister, W. Brentley, D. George, S. Harvey, W. Kleinfelder, K. McAuliffe, E. Melton, V. Norton, and J. Weiss. The IBM research parallel processor prototype (RPJ): introduction and architecture. In Proceedings of the 1985 international Conference on Parallel Processing, August 1985.
[8]
Richard Rashid, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky, and Jonathan Chew. Machine-independent virtual memory management for paged uniproceasor and multiprocessor architectures, in Proceedings of the ~nd International Conference on Architectural Support for Programming Languages and Operating Systems, pages 31-39, October 1087.
[9]
Sequent Computer Systems, Inc. Balance 8000 Technical Summary. Sequent Computer SysterrL~, Inc., 1986.
[10]
A.J. Smith. Cache evaluation and the impact of workload choice. In Proceedings of the l~th Annual International Symposium on Computer Architecture, pages 04-73, 1985.
[11]
A.J. Smith. A modified working set paging algorithm. IEEE Transactions on Computers, C-25(9):907- 914, September 1976.
[12]
S.S. Thakkar and A.E. Knowles. A high-performance memory management scheme. IEEE Computer, 19(5):8- 22, May 1986.
[13]
D.A. Wood, S.J. Eggers, G. Gibson, M.D. Hill, J.M. Pendleton, S.A. Ritchie, G.S. Taylor, R.H. Katz, and D.A. Patterson. An in-cache address translation mechanism. In Proceedings of the 13th Annual International Symposium on Computer Architecture, pages 358-305, June 1086.

Cited By

View all

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
ICS '88: Proceedings of the 2nd international conference on Supercomputing
June 1988
679 pages
ISBN:0897912721
DOI:10.1145/55364
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1988

Permissions

Request permissions for this article.

Check for updates

Qualifiers

  • Article

Acceptance Rates

Overall Acceptance Rate 629 of 2,180 submissions, 29%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)27
  • Downloads (Last 6 weeks)13
Reflects downloads up to 21 Sep 2024

Other Metrics

Citations

Cited By

View all
  • (2018)Intellectual property rights of multimedia enriched websitesUbiquity10.1145/763958.7639602003:January(2)Online publication date: 23-Sep-2018
  • (2003)Continuous program optimizationACM Transactions on Programming Languages and Systems10.1145/778559.77856225:4(500-548)Online publication date: 1-Jul-2003
  • (1992)An analysis of dynamic page placement on a NUMA multiprocessorACM SIGMETRICS Performance Evaluation Review10.1145/149439.13308220:1(23-34)Online publication date: 1-Jun-1992
  • (1992)An analysis of dynamic page placement on a NUMA multiprocessorProceedings of the 1992 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems10.1145/133057.133082(23-34)Online publication date: 1-Jun-1992
  • (1992)Evaluation of NUMA Memory Management Through Modeling and MeasurementsIEEE Transactions on Parallel and Distributed Systems10.1109/71.1806243:6(686-701)Online publication date: 1-Nov-1992
  • (1991)The robustness of NUMA memory managementACM SIGOPS Operating Systems Review10.1145/121133.12115825:5(137-151)Online publication date: 1-Sep-1991
  • (1991)The robustness of NUMA memory managementProceedings of the thirteenth ACM symposium on Operating systems principles10.1145/121132.121158(137-151)Online publication date: 1-Sep-1991
  • (1991)Exploiting operating system support for dynamic page placement on a NUMA shared memory multiprocessorACM SIGPLAN Notices10.1145/109626.10963926:7(122-132)Online publication date: 1-Apr-1991
  • (1991)Exploiting operating system support for dynamic page placement on a NUMA shared memory multiprocessorProceedings of the third ACM SIGPLAN symposium on Principles and practice of parallel programming10.1145/109625.109639(122-132)Online publication date: 1-Apr-1991
  • (1990)An investigation of curvature variations over recursively generated B-spline surfacesACM Transactions on Graphics10.1145/88560.885809:4(424-437)Online publication date: 1-Oct-1990
  • Show More Cited By

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Get Access

Login options

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media