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Hardware-Software Codesign in Embedded Asymmetric Cryptography Application – A Case Study

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Field Programmable Logic and Application (FPL 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2778))

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Abstract

This paper presents a case study of a hardware-software codesign of the RSA cipher embedded in reconfigurable hardware. The soft cores of Altera’s Nios RISC processor are used as the basic building block of the proposed complete embedded solutions. The effect of moving computationally intensive parts of RSA into an optimized parameterized scalable Montgomery coprocessor(s) is analyzed and compared with a pure software solution. The impact of the tasks distribution between the hardware and the software on the occupation of logic resources as well as the speed of the algorithm is demonstrated and generalized.

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References

  1. Menezes, J.A., Oorschot, P.C., Vanstone, S.A.: Applied Cryptography. CRC Press, New York (1997)

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  2. Tenca, A.F., Koc, C.K.: A scalable architecture for Montgomery multiplication. In: Koç, Ç.K., Paar, C. (eds.) CHES 1999. LNCS, vol. 1717, pp. 94–108. Springer, Heidelberg (1999)

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  3. Šimka, M., Fischer, V.: Montgomery Multiplication Coprocessor for Altera Nios Embedded Processor. In: Proceedings of the 5th International Scientific Conference on Electronic Computers and Informatics 2002, Kosice, Slovakia, October 2002, pp. 206–211 (2002)

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  4. Nios Soft Core Embedded processor, www.altera.com/nios

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Author information

Authors and Affiliations

  1. Department of Electronics and Multimedia Communications, Technical University of Košice, Park Komenského 13, 04120, Košice, Slovakia

    Martin Šimka & Miloš Drutarovský

  2. Laboratoire Traitement du Signal et Instrumentation, Unité Mixte de Recherche CNRS 5516, Université Jean Monnet, Saint-Etienne, France

    Viktor Fischer

Authors
  1. Martin Šimka
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  2. Viktor Fischer
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  3. Miloš Drutarovský
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Editor information

Editors and Affiliations

  1. Department of Electrical and Electronic Engineering, Imperial College London, Exhibition Road, SW7 2BT, London, UK

    Peter Y. K. Cheung

  2. Department of Electrical & Electronic Engineering, Imperial College London, Exhibition Road, SW7 2BT, London, UK

    George A. Constantinides

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© 2003 Springer-Verlag Berlin Heidelberg

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Šimka, M., Fischer, V., Drutarovský, M. (2003). Hardware-Software Codesign in Embedded Asymmetric Cryptography Application – A Case Study. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_123

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  • DOI: https://doi.org/10.1007/978-3-540-45234-8_123

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40822-2

  • Online ISBN: 978-3-540-45234-8

  • eBook Packages: Springer Book Archive

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