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Activity overview
Contribution activity
December 2021
Created 18 commits in 2 repositories
Reviewed 29 pull requests in 2 repositories
llvm/circt
28 pull requests
- [HW] Fix PortInfo construction to get the symbols. NFC
- [FIRTOOL] Move HWCleanup after canonicalizer
- [FIRRTL] Make foldWhenEncodedVerifOp handle PrintOp even when they are not at a block begin
- [FIRRTL] Add multibit_mux op and lowerings
- [Reducer][FIRRTL] Fix memory stubber for memories with bundles
- [ExportVerilog] Use verilogName attr instead of Name Table
- [LowerToHW] Fix reg init via verbatim ops
- [SVExtractCode] Add missing assert operations
- [Comb] Don't canonicalize muxs to array-selects when the index is large
-
[ExportVerilog] Improve
isExpressionUnableToInlinefor struct types - HIR dialect
- [SV] Allow constantX/Z to have non-integer types
- [FIRRTL] add EmitModuleSwappingConfig pass
- [ExportVerilog] Don't emit "logic" for temporaries with struct types
- [ExportVerilog] Fix empty struct emission
- [HW] Use StringAttr instead of StringRef in FieldInfo, nfc
- [FIRRTL/LowerTypes][FIRTOOL] Preserve aggregate at lowertypes
- [FIRRTL/LowerToHW] Support bundle type lowering
- [LowerToHW] Lower firrtl.subfield to sv.struct_field_inout for inout types
- [SV][ExportVerilog] Add sv.struct_field_inout op
- [ExportVerilog] Add the verilogname attribute for updated verilog name
- [FIRRTL] Add CHIRRTL dialect
-
[FIRRTL] Remove fold
mux(p, invalid, x) -> x -
[ExportVerilog] Implement
sv.namehint - [PyCDE] Updating naming to use new 'sv.namehint' attribute
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circt/perf
1 pull request
Created an issue in llvm/circt that received 3 comments
[ExportVerilog] Try harder with synthesized names
We synthesize _T names when spilling things (e.g. due to multiple uses) and don't always have a pretty name available. We should try harder in simp…
3
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