lattner
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May 2021
Created 57 commits in 3 repositories
Created a pull request in llvm/llvm-www that received 1 comment
Reviewed 36 pull requests in 1 repository
llvm/circt 36 pull requests
- [FIRRTL] Add a ReplaceSubaccess canonicalizer for SubaccessOp
- [FIRRTL] canonicalize zero-width memories
- [FIRRTL] Move result type computation to InferTypeOpInterface
- [FIRRTL] Fix constant width inference and connection truncation
- Bind support
- [LowerToHw] Add symbol name to publicly visible sv::WireOp
- [FIRRTL] Fix the handling of DShlwPrimOp
-
[ESI] Ditch
esi.structtype - [FIRRTL] Ignore ops not affecting width inference
- Support Scattering SiFive "Grand Central" Annotations
-
[ExportVerilog] Add
output_fileattribute for top-level ops - [HandshakeToFIRRTL] Fix use of stack allocated vector.
- [ExportVerilog] Pass an Operation to print type instead of Location.
- Attach symbols to instances, wires, and regs.
- [FIRRTL] Add parser-timing firtool option
- Update the Generator Callout Pass
- [RTL] Add type declaration ops.
- [firtool] Run CheckWidths pass, add option for InferWidths
- Move verification of instanceop's target being a module to a constraint
- [FIRRTL] Add black box source helper pass
- Lower firrtl::memop to generator modules
- [RTL] Support typedecls in ExportVerilog.
- Add suport for system verilog bind statements.
- Support ReferenceTarget Annotations for Ports
- [FIRRTL] Add width inference on most expressions
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Created an issue in llvm/circt that received 4 comments
MLIR pass manager not running firrtl.module passes (e.g. CSE) in parallel
This is because the LLVM taskgroup implementation is really bad. It doesn't allow nested parallelism, and the top level firrtl.circuit operation is…
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Opened 6 other issues in 1 repository
llvm/circt
3
closed
3
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-
Check our handling of
dshlw - [firrtl] Width inference doesn't support when's yet
- [firrtl] LowerTypes crashes on HwachaSequencer.fir
- [firrtl] Flow checking rejects firrtl/regress/Rob.fir
- [firrtl] Canonicalize firrtl.regreset -> firrtl.reg when possible
- Refactor FirMemory / analyzeMemOp, etc to reduce duplication