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51 followers · 42 following · 172
  • NJ

Highlights

  • Arctic Code Vault Contributor

Pinned

  1. spi_tb

    CPOL=0, CPHA=0 SPI core for practicing formal verification with yosys

    Verilog 16 1

  2. ym2151-decap

    Silicon die analysis of the Yamaha YM2151 FM Synthesis chip

    Lua 43 6

  3. AT2XT

    AT to XT Keyboard Protocol Converter firmware + schematic

    AGS Script 17 5

  4. nwbackup

    Network Backup program for mTCP (old DOS machines) and possible embedded targets.

    C++ 1

  5. pcd-netbsd

    Panasonic CD Driver for NetBSD (Test to write a device driver w/ IOCTL)

    C

  6. ProgHQ/open-tl866

    Open Programming Firmware for the TL866A Programmer.

    C 78 14

774 contributions in the last year

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Contribution activity

January 2021

Created 11 commits in 2 repositories
Created 5 repositories

Created a pull request in enjoy-digital/litex that received 1 comment

Windows fixes for `litex_term`

Avoid importing modules which don't exist on Windows. Set ENABLE_VIRTUAL_TERMINAL_PROCESSING flag when litex_term starts. This tells console proce…

+56 −3 • 1 comment
Opened 3 other pull requests in 3 repositories
Reviewed 1 pull request in 1 repository
hathach/tinyusb 1 pull request

Created an issue in enjoy-digital/litex that received 3 comments

Serial core in separate clock domain should have its async FIFOs reset in system clock domain

Not sure the best way to proceed here is. Duplicating description of problem from IRC for convenience: (2:13:10 AM) cr1901_modern: florent: I figu…

3 comments
Opened 1 other issue in 1 repository

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