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FAR: fixed-points addition & relaxation based placement

Published: 07 April 2002 Publication History

Abstract

In this paper we describe the Fixed-points Addition and Relaxation (FAR) based placement technique. Fixed point is a pseudo cell connected to a movable cell. By introducing fixed points, the placement can be maintained in a force equilibrium state and further transformed into another equilibrium state. By relaxing some of the previously introduced fixed points, we can partially or completely collapse the current placement in order to reposition the cells, or incrementally perturb the existing good solution to fulfill additional requirements. We apply the FAR-based approach to global placement for total wire length minimization, and to incremental placement for Buffer Site Generation (BSG). For global placement, our experimental results show that the FAR method achieves 54.4% CPU speedup and total wire length comparable to that achieved by the constant force based approach [1]. Experimental results indicate that to accommodate buffers in specific regions, FAR is able to perturb incrementally a given solution in a well-controlled way.

References

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[2]
J.M.Kleinhans, G.Sigl, F.M.Johannes and K.J.Antreich, "GORDIAN: VLSI Placement by Quadratic Programming and Slicing Optimization", IEEE Trans. CAD, vol.10, no.3, Mar1991, pp.356--365.
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H.Etawil, S.Areibi, A.Vannelli, "Attractor-repealer approach for global placement", in Proc. of International Conference on Computer-Aided Design, pp.20--24, 1999.
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J.Cong, T.Kong and D.Z.Pan, "Buffer Block Planning for Interconnect-Driven Floorplanning", Proc. IEEE/ACM Int. Conf. Comput.-Aided Design, 1999, pp.358--363.
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F.F.Dragan, A.B.Kahng, I.Mandoiu, S.Umddu, "Provably Good Global Buffering Using an Available Buffer Block Plan", IEEE/ACM ICCAD, 2000, pp. 104--109.
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C.J.Alpert, Jiang Hu, S.S.Sapatnekar, P.G.Villarrubia, "A Practical Methodology for Early Buffer and Wire Resource Allocation", Design Automation Conference, 2001, pp. 189--194.
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M.Wang, X.Yang, M.Sarrafzadeh, "Dragon2000: standard-cell placement tool for large industry circuits", IEEE/ACM ICCAD, 2000, pp. 260--263.
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A.E.Caldwell, A.B.Kahng, I.L.Markov, "Can recursive bisec¿tion alone produce routable placements", Design Automation Conference, 2000, pp. 477--482.
[11]
"http://vlsicad.cs.binghamton.edu/benchmarks.html".
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"http://www.tu-dresden.de/mwism/skalicky/laspack/laspack.html"

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cover image ACM Conferences
ISPD '02: Proceedings of the 2002 international symposium on Physical design
April 2002
216 pages
ISBN:1581134606
DOI:10.1145/505388
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 07 April 2002

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April 7 - 10, 2002
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  • (2017)Search space reduction for the non-exact projective NPNP Boolean matching problem2017 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2017.8050970(1-4)Online publication date: May-2017
  • (2017)Cell spreading optimization for force-directed global placers2017 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2017.8050572(1-4)Online publication date: May-2017
  • (2015)A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits2015 28th International Conference on VLSI Design10.1109/VLSID.2015.77(423-428)Online publication date: Jan-2015
  • (2013)SimPLCommunications of the ACM10.1145/2461256.246127956:6(105-113)Online publication date: 1-Jun-2013
  • (2012)Accurate and fast cell spreading for force directed placement2012 4th Asia Symposium on Quality Electronic Design (ASQED)10.1109/ACQED.2012.6320470(23-28)Online publication date: Jul-2012
  • (2010)SimPLProceedings of the International Conference on Computer-Aided Design10.5555/2133429.2133568(649-656)Online publication date: 7-Nov-2010
  • (2009)Lens aberration aware placement for timing yieldACM Transactions on Design Automation of Electronic Systems10.1145/1455229.145524514:1(1-26)Online publication date: 23-Jan-2009
  • (2009)PlacementElectronic Design Automation10.1016/B978-0-12-374364-0.50018-7(635-685)Online publication date: 2009
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