Lockless patterns: relaxed access and partial memory barriers

Posted Mar 20, 2021 14:25 UTC (Sat) by Wol (subscriber, #4433)
In reply to: Lockless patterns: relaxed access and partial memory barriers by alison
Parent article: Lockless patterns: relaxed access and partial memory barriers

> Paging device manufacturers! GCC opines that "it is unwise to use volatile bit-fields to access hardware."

I thought that was the justification for introducing volatile! That other actors *do* have access to that memory location, and *will* be reading/writing to it.

Cheers,
Wol

Lockless patterns: relaxed access and partial memory barriers

Posted Mar 20, 2021 15:42 UTC (Sat) by zlynx (guest, #2285) [Link]

Hardware can have all kinds of odd access requirements and there is no way to define these with C bitfields, volatile or not.

Do you read 16 bits, modify 3 of them and write it back? Or is it 32 bits or 8 bits?

And I believe some hardware does not allow reading. Instead you need to keep a shadow copy and write the whole byte, word, double word or whatever.