OvmfPkg/RiscVVirt: Add SEC module

Add the SEC module for RISC-V Qemu virt machine support.
It uses the PEI less design.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>

diff --git a/OvmfPkg/RiscVVirt/Sec/Cpu.c b/OvmfPkg/RiscVVirt/Sec/Cpu.c
new file mode 100644 (file)
index 0000000..2c16df6
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/Cpu.c
@@ -0,0 +1,33 @@
+/** @file\r
+The library call to pass the device tree to DXE via HOB.\r
+\r
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+//\r
+//// The package level header files this module uses\r
+////\r
+#include <PiPei.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/HobLib.h>\r
+\r
+/**\r
+  Cpu Peim initialization.\r
+\r
+**/\r
+EFI_STATUS\r
+CpuPeimInitialization (\r
+  VOID\r
+  )\r
+{\r
+  //\r
+  // for MMU type >= sv39\r
+  //\r
+  BuildCpuHob (56, 32);\r
+\r
+  return EFI_SUCCESS;\r
+}\r

diff --git a/OvmfPkg/RiscVVirt/Sec/Memory.c b/OvmfPkg/RiscVVirt/Sec/Memory.c
new file mode 100644 (file)
index 0000000..70935b0
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/Memory.c
@@ -0,0 +1,263 @@
+/** @file\r
+  Memory Detection for Virtual Machines.\r
+\r
+  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+Module Name:\r
+\r
+  MemDetect.c\r
+\r
+**/\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <PiPei.h>\r
+\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/PeimEntryPoint.h>\r
+#include <Library/ResourcePublicationLib.h>\r
+#include <Library/BaseRiscVSbiLib.h>\r
+#include <Register/RiscV64/RiscVEncoding.h>\r
+#include <Library/PrePiLib.h>\r
+#include <libfdt.h>\r
+#include <Guid/FdtHob.h>\r
+\r
+VOID\r
+BuildMemoryTypeInformationHob (\r
+  VOID\r
+  );\r
+\r
+/**\r
+  Build reserved memory range resource HOB.\r
+\r
+  @param  MemoryBase     Reserved memory range base address.\r
+  @param  MemorySize     Reserved memory range size.\r
+\r
+**/\r
+STATIC\r
+VOID\r
+AddReservedMemoryBaseSizeHob (\r
+  EFI_PHYSICAL_ADDRESS  MemoryBase,\r
+  UINT64                MemorySize\r
+  )\r
+{\r
+  BuildResourceDescriptorHob (\r
+    EFI_RESOURCE_MEMORY_RESERVED,\r
+    EFI_RESOURCE_ATTRIBUTE_PRESENT     |\r
+    EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+    EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+    EFI_RESOURCE_ATTRIBUTE_TESTED,\r
+    MemoryBase,\r
+    MemorySize\r
+    );\r
+}\r
+\r
+/**\r
+  Create memory range resource HOB using the memory base\r
+  address and size.\r
+\r
+  @param  MemoryBase     Memory range base address.\r
+  @param  MemorySize     Memory range size.\r
+\r
+**/\r
+STATIC\r
+VOID\r
+AddMemoryBaseSizeHob (\r
+  EFI_PHYSICAL_ADDRESS  MemoryBase,\r
+  UINT64                MemorySize\r
+  )\r
+{\r
+  BuildResourceDescriptorHob (\r
+    EFI_RESOURCE_SYSTEM_MEMORY,\r
+    EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+    EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+    EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+    EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
+    EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
+    EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
+    EFI_RESOURCE_ATTRIBUTE_TESTED,\r
+    MemoryBase,\r
+    MemorySize\r
+    );\r
+}\r
+\r
+/**\r
+  Create memory range resource HOB using memory base\r
+  address and top address of the memory range.\r
+\r
+  @param  MemoryBase     Memory range base address.\r
+  @param  MemoryLimit    Memory range size.\r
+\r
+**/\r
+STATIC\r
+VOID\r
+AddMemoryRangeHob (\r
+  EFI_PHYSICAL_ADDRESS  MemoryBase,\r
+  EFI_PHYSICAL_ADDRESS  MemoryLimit\r
+  )\r
+{\r
+  AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
+}\r
+\r
+/**\r
+  Configure MMU\r
+**/\r
+STATIC\r
+VOID\r
+InitMmu (\r
+  )\r
+{\r
+  //\r
+  // Set supervisor translation mode to Bare mode\r
+  //\r
+  RiscVSetSupervisorAddressTranslationRegister ((UINT64)SATP_MODE_OFF << 60);\r
+  DEBUG ((DEBUG_INFO, "%a: Set Supervisor address mode to bare-metal mode.\n", __FUNCTION__));\r
+}\r
+\r
+/**\r
+  Publish system RAM and reserve memory regions.\r
+\r
+**/\r
+STATIC\r
+VOID\r
+InitializeRamRegions (\r
+  EFI_PHYSICAL_ADDRESS  SystemMemoryBase,\r
+  UINT64                SystemMemorySize,\r
+  EFI_PHYSICAL_ADDRESS  MmodeResvBase,\r
+  UINT64                MmodeResvSize\r
+  )\r
+{\r
+  /*\r
+   * M-mode FW can be loaded anywhere in memory but should not overlap\r
+   * with the EDK2. This can happen if some other boot code loads the\r
+   * M-mode firmware.\r
+   *\r
+   * The M-mode firmware memory should be marked as reserved memory\r
+   * so that OS doesn't use it.\r
+   */\r
+  DEBUG ((\r
+    DEBUG_INFO,\r
+    "%a: M-mode FW Memory Start:0x%lx End:0x%lx\n",\r
+    __FUNCTION__,\r
+    MmodeResvBase,\r
+    MmodeResvBase + MmodeResvSize\r
+    ));\r
+  AddReservedMemoryBaseSizeHob (MmodeResvBase, MmodeResvSize);\r
+\r
+  if (MmodeResvBase > SystemMemoryBase) {\r
+    AddMemoryRangeHob (SystemMemoryBase, MmodeResvBase);\r
+  }\r
+\r
+  AddMemoryRangeHob (\r
+    MmodeResvBase + MmodeResvSize,\r
+    SystemMemoryBase + SystemMemorySize\r
+    );\r
+}\r
+\r
+/**\r
+  Initialize memory hob based on the DTB information.\r
+\r
+  @return EFI_SUCCESS     The memory hob added successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+MemoryPeimInitialization (\r
+  VOID\r
+  )\r
+{\r
+  EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContext;\r
+  CONST UINT64                *RegProp;\r
+  CONST CHAR8                 *Type;\r
+  UINT64                      CurBase, CurSize;\r
+  INT32                       Node, Prev;\r
+  INT32                       Len;\r
+  VOID                        *FdtPointer;\r
+  EFI_PHYSICAL_ADDRESS        MmodeResvBase;\r
+  UINT64                      MmodeResvSize;\r
+\r
+  FirmwareContext = NULL;\r
+  GetFirmwareContextPointer (&FirmwareContext);\r
+\r
+  if (FirmwareContext == NULL) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree;\r
+  if (FdtPointer == NULL) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  /* try to locate the reserved memory opensbi node */\r
+  Node = fdt_path_offset (FdtPointer, "/reserved-memory/mmode_resv0");\r
+  if (Node >= 0) {\r
+    RegProp = fdt_getprop (FdtPointer, Node, "reg", &Len);\r
+    if ((RegProp != 0) && (Len == (2 * sizeof (UINT64)))) {\r
+      MmodeResvBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));\r
+      MmodeResvSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));\r
+    }\r
+  }\r
+\r
+  // Look for the lowest memory node\r
+  for (Prev = 0; ; Prev = Node) {\r
+    Node = fdt_next_node (FdtPointer, Prev, NULL);\r
+    if (Node < 0) {\r
+      break;\r
+    }\r
+\r
+    // Check for memory node\r
+    Type = fdt_getprop (FdtPointer, Node, "device_type", &Len);\r
+    if (Type && (AsciiStrnCmp (Type, "memory", Len) == 0)) {\r
+      // Get the 'reg' property of this node. For now, we will assume\r
+      // two 8 byte quantities for base and size, respectively.\r
+      RegProp = fdt_getprop (FdtPointer, Node, "reg", &Len);\r
+      if ((RegProp != 0) && (Len == (2 * sizeof (UINT64)))) {\r
+        CurBase = fdt64_to_cpu (ReadUnaligned64 (RegProp));\r
+        CurSize = fdt64_to_cpu (ReadUnaligned64 (RegProp + 1));\r
+\r
+        DEBUG ((\r
+          DEBUG_INFO,\r
+          "%a: System RAM @ 0x%lx - 0x%lx\n",\r
+          __FUNCTION__,\r
+          CurBase,\r
+          CurBase + CurSize - 1\r
+          ));\r
+\r
+        if ((MmodeResvBase >= CurBase) && ((MmodeResvBase + MmodeResvSize) <= (CurBase + CurSize))) {\r
+          InitializeRamRegions (\r
+            CurBase,\r
+            CurSize,\r
+            MmodeResvBase,\r
+            MmodeResvSize\r
+            );\r
+        } else {\r
+          AddMemoryBaseSizeHob (CurBase, CurSize);\r
+        }\r
+      } else {\r
+        DEBUG ((\r
+          DEBUG_ERROR,\r
+          "%a: Failed to parse FDT memory node\n",\r
+          __FUNCTION__\r
+          ));\r
+      }\r
+    }\r
+  }\r
+\r
+  InitMmu ();\r
+\r
+  BuildMemoryTypeInformationHob ();\r
+\r
+  return EFI_SUCCESS;\r
+}\r

diff --git a/OvmfPkg/RiscVVirt/Sec/Platform.c b/OvmfPkg/RiscVVirt/Sec/Platform.c
new file mode 100644 (file)
index 0000000..e8fd126
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/Platform.c
@@ -0,0 +1,84 @@
+/** @file\r
+The library call to pass the device tree to DXE via HOB.\r
+\r
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+//\r
+//// The package level header files this module uses\r
+////\r
+#include <PiPei.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/BaseRiscVSbiLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Include/Library/PrePiLib.h>\r
+#include <libfdt.h>\r
+#include <Guid/FdtHob.h>\r
+\r
+/**\r
+  @retval EFI_SUCCESS            The address of FDT is passed in HOB.\r
+          EFI_UNSUPPORTED        Can't locate FDT.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PlatformPeimInitialization (\r
+  VOID\r
+  )\r
+{\r
+  EFI_RISCV_FIRMWARE_CONTEXT  *FirmwareContext;\r
+  VOID                        *FdtPointer;\r
+  VOID                        *Base;\r
+  VOID                        *NewBase;\r
+  UINTN                       FdtSize;\r
+  UINTN                       FdtPages;\r
+  UINT64                      *FdtHobData;\r
+\r
+  FirmwareContext = NULL;\r
+  GetFirmwareContextPointer (&FirmwareContext);\r
+\r
+  if (FirmwareContext == NULL) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Firmware Context is NULL\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree;\r
+  if (FdtPointer == NULL) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  DEBUG ((DEBUG_INFO, "%a: Build FDT HOB - FDT at address: 0x%x \n", __FUNCTION__, FdtPointer));\r
+  Base = FdtPointer;\r
+  if (fdt_check_header (Base) != 0) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Corrupted DTB\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  FdtSize  = fdt_totalsize (Base);\r
+  FdtPages = EFI_SIZE_TO_PAGES (FdtSize);\r
+  NewBase  = AllocatePages (FdtPages);\r
+  if (NewBase == NULL) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Could not allocate memory for DTB\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));\r
+\r
+  FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData);\r
+  if (FdtHobData == NULL) {\r
+    DEBUG ((DEBUG_ERROR, "%a: Could not build FDT Hob\n", __FUNCTION__));\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  *FdtHobData = (UINTN)NewBase;\r
+\r
+  BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSize));\r
+\r
+  return EFI_SUCCESS;\r
+}\r

diff --git a/OvmfPkg/RiscVVirt/Sec/SecEntry.S b/OvmfPkg/RiscVVirt/Sec/SecEntry.S
new file mode 100644 (file)
index 0000000..e919a3c
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/SecEntry.S
@@ -0,0 +1,21 @@
+/*\r
+  Copyright (c) 2022 Ventana Micro Systems Inc.\r
+\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+ */\r
+\r
+#include "SecMain.h"\r
+\r
+.text\r
+.align 3\r
+\r
+ASM_FUNC (_ModuleEntryPoint)\r
+  /* Use Temp memory as the stack for calling to C code */\r
+  li    a4, FixedPcdGet32 (PcdOvmfSecPeiTempRamBase)\r
+  li    a5, FixedPcdGet32 (PcdOvmfSecPeiTempRamSize)\r
+\r
+  /* Use Temp memory as the stack for calling to C code */\r
+  add   sp, a4, a5\r
+\r
+  call SecStartup\r

diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.c b/OvmfPkg/RiscVVirt/Sec/SecMain.c
new file mode 100644 (file)
index 0000000..054e49e
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/SecMain.c
@@ -0,0 +1,104 @@
+/** @file\r
+  RISC-V SEC phase module for Qemu Virt.\r
+\r
+  Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>\r
+\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include "SecMain.h"\r
+\r
+STATIC\r
+EFI_STATUS\r
+EFIAPI\r
+SecInitializePlatform (\r
+  VOID\r
+  )\r
+{\r
+  EFI_STATUS  Status;\r
+\r
+  MemoryPeimInitialization ();\r
+\r
+  CpuPeimInitialization ();\r
+\r
+  // Set the Boot Mode\r
+  SetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r
+\r
+  Status = PlatformPeimInitialization ();\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+\r
+  Entry point to the C language phase of SEC. After the SEC assembly\r
+  code has initialized some temporary memory and set up the stack,\r
+  the control is transferred to this function.\r
+\r
+\r
+  @param[in]  BootHartId         Hardware thread ID of boot hart.\r
+  @param[in]  DeviceTreeAddress  Pointer to Device Tree (DTB)\r
+**/\r
+VOID\r
+NORETURN\r
+EFIAPI\r
+SecStartup (\r
+  IN  UINTN  BootHartId,\r
+  IN  VOID   *DeviceTreeAddress\r
+  )\r
+{\r
+  EFI_HOB_HANDOFF_INFO_TABLE  *HobList;\r
+  EFI_RISCV_FIRMWARE_CONTEXT  FirmwareContext;\r
+  EFI_STATUS                  Status;\r
+  UINT64                      UefiMemoryBase;\r
+  UINT64                      StackBase;\r
+\r
+  //\r
+  // Report Status Code to indicate entering SEC core\r
+  //\r
+  DEBUG ((\r
+    DEBUG_INFO,\r
+    "%a() BootHartId: 0x%x, DeviceTreeAddress=0x%x\n",\r
+    __FUNCTION__,\r
+    BootHartId,\r
+    DeviceTreeAddress\r
+    ));\r
+\r
+  FirmwareContext.BootHartId          = BootHartId;\r
+  FirmwareContext.FlattenedDeviceTree = (UINT64)DeviceTreeAddress;\r
+  SetFirmwareContextPointer (&FirmwareContext);\r
+\r
+  StackBase      = (UINT64)FixedPcdGet32 (PcdOvmfSecPeiTempRamBase);\r
+  UefiMemoryBase = StackBase +  FixedPcdGet32 (PcdOvmfSecPeiTempRamSize) - SIZE_32MB;\r
+\r
+  // Declare the PI/UEFI memory region\r
+  HobList = HobConstructor (\r
+              (VOID *)UefiMemoryBase,\r
+              SIZE_32MB,\r
+              (VOID *)UefiMemoryBase,\r
+              (VOID *)StackBase // The top of the UEFI Memory is reserved for the stacks\r
+              );\r
+  PrePeiSetHobList (HobList);\r
+\r
+  SecInitializePlatform ();\r
+\r
+  //\r
+  // Process all libraries constructor function linked to SecMain.\r
+  //\r
+  ProcessLibraryConstructorList ();\r
+\r
+  // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
+  Status = DecompressFirstFv ();\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  // Load the DXE Core and transfer control to it\r
+  Status = LoadDxeCoreFromFv (NULL, 0);\r
+  ASSERT_EFI_ERROR (Status);\r
+  //\r
+  // Should not come here.\r
+  //\r
+  UNREACHABLE ();\r
+}\r

diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.h b/OvmfPkg/RiscVVirt/Sec/SecMain.h
new file mode 100644 (file)
index 0000000..83a8058
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/SecMain.h
@@ -0,0 +1,102 @@
+/** @file\r
+  Master header file for SecCore.\r
+\r
+  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef SEC_MAIN_H_\r
+#define SEC_MAIN_H_\r
+\r
+#include <PiPei.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugAgentLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/ExtractGuidedSectionLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/PeCoffExtraActionLib.h>\r
+#include <Library/PeCoffGetEntryPointLib.h>\r
+#include <Library/PeCoffLib.h>\r
+#include <Library/PeiServicesLib.h>\r
+#include <Library/PeiServicesTablePointerLib.h>\r
+#include <Library/DebugPrintErrorLevelLib.h>\r
+#include <Library/PrintLib.h>\r
+#include <Library/BaseRiscVSbiLib.h>\r
+#include <Library/PrePiLib.h>\r
+#include <Library/PlatformInitLib.h>\r
+#include <Library/PrePiHobListPointerLib.h>\r
+#include <Register/RiscV64/RiscVImpl.h>\r
+\r
+/**\r
+  Entry point to the C language phase of SEC. After the SEC assembly\r
+  code has initialized some temporary memory and set up the stack,\r
+  the control is transferred to this function.\r
+\r
+  @param SizeOfRam           Size of the temporary memory available for use.\r
+  @param TempRamBase         Base address of temporary ram\r
+  @param BootFirmwareVolume  Base address of the Boot Firmware Volume.\r
+**/\r
+VOID\r
+NORETURN\r
+EFIAPI\r
+SecStartup (\r
+  IN  UINTN  BootHartId,\r
+  IN  VOID   *DeviceTreeAddress\r
+  );\r
+\r
+/**\r
+  Auto-generated function that calls the library constructors for all of the module's\r
+  dependent libraries.  This function must be called by the SEC Core once a stack has\r
+  been established.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+  VOID\r
+  );\r
+\r
+/**\r
+  Perform Platform PEIM initialization.\r
+\r
+  @return EFI_SUCCESS     The platform initialized successfully.\r
+  @retval  Others        - As the error code indicates\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PlatformPeimInitialization (\r
+  VOID\r
+  );\r
+\r
+/**\r
+  Perform Memory PEIM initialization.\r
+\r
+  @return EFI_SUCCESS     The platform initialized successfully.\r
+  @retval  Others        - As the error code indicates\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+MemoryPeimInitialization (\r
+  VOID\r
+  );\r
+\r
+/**\r
+  Perform CPU PEIM initialization.\r
+\r
+  @return EFI_SUCCESS     The platform initialized successfully.\r
+  @retval  Others        - As the error code indicates\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CpuPeimInitialization (\r
+  VOID\r
+  );\r
+\r
+#endif\r

diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.inf b/OvmfPkg/RiscVVirt/Sec/SecMain.inf
new file mode 100644 (file)
index 0000000..aed35d3
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/Sec/SecMain.inf
@@ -0,0 +1,66 @@
+## @file\r
+#  SEC Driver for RISC-V\r
+#\r
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.<BR>\r
+#\r
+#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+##\r
+\r
+[Defines]\r
+  INF_VERSION                    = 0x0001001B\r
+  BASE_NAME                      = SecMainRiscV64\r
+  FILE_GUID                      = 16740C0A-AA84-4F62-A06D-AE328057AE07\r
+  MODULE_TYPE                    = SEC\r
+  VERSION_STRING                 = 1.0\r
+  ENTRY_POINT                    = SecMain\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = RISCV64\r
+#\r
+\r
+[Sources]\r
+  SecEntry.S\r
+  SecMain.c\r
+  SecMain.h\r
+  Cpu.c\r
+  Memory.c\r
+  Platform.c\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+  MdeModulePkg/MdeModulePkg.dec\r
+  UefiCpuPkg/UefiCpuPkg.dec\r
+  OvmfPkg/OvmfPkg.dec\r
+  EmbeddedPkg/EmbeddedPkg.dec\r
+\r
+[LibraryClasses]\r
+  BaseLib\r
+  DebugLib\r
+  PcdLib\r
+  IoLib\r
+  PeCoffLib\r
+  LzmaDecompressLib\r
+  RiscVSbiLib\r
+  PrePiLib\r
+  FdtLib\r
+  MemoryAllocationLib\r
+  HobLib\r
+\r
+[Ppis]\r
+  gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED\r
+  gEfiTemporaryRamDonePpiGuid                   ## PRODUCES\r
+\r
+[Pcd]\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress\r
+\r
+[Guids]\r
+  gFdtHobGuid\r