Data Transfers
Basic Data Transfers
Basic
Matched Memory
Matched Memory w/o Wait
Streaming Data Transfers
32 or 16 bit Streaming
64-bit Streaming
64-bit Streaming w/50ns
Cycle
Basic
Data Transfer Cycle
The basic transfer cycle works by first defining the address
(in memory or I/O space) where a transfer is to occur, and then, in a second
operation of equal length actually transferring the data. Each half of
the operation (defining the address and data transfer) takes 100ns, or
200ns total.
Five such “default” cycles can be performed in a millionth
of a second. Each cycle moves four or two bytes per transfer, yielding
a data transfer rate of 20MB/sec for 32-bit (4 byte) transfers or 10MB/s
for 16-bit (2 byte) transfers.
Basic Data Transfer
|
Time
|
100ns
|
100ns
|
| |
Addr
|
Data |
Matched Memory
Cycle
MMC’s basic transfer cycle works by first defining the
address (in memory or I/O space) where a transfer is to occur, inserting
a wait state, and then actually transferring the data. Each third of the
operation (defining the address, wait, and and data transfer) takes 62.5ns,
or 187.5ns total.
Five and a third MM cycles can be completed in a millionth
of a second. Each cycle moves four or two bytes per transfer, yielding
a data transfer rate of 21.33MB/sec for 32-bit (4 byte) transfers or 10.66MB/sec
for 16-bit (2 byte) transfers.
Matched Memory Cycle
|
Time
|
62.5ns
|
62.5ns
|
62.5ns
|
|
|
Addr
|
Wait
|
Data
|
MM cycle without Wait
State
Total cycle time is 125ns and for 32-bit transfers
this results in a data transfer rate of 32MB/sec. Note
that the 16MHz 8580 supports 62.5ns address and data transfer cycles.
Matched Memory without Wait State
|
Time
|
62.5ns
|
62.5ns
|
|
|
Addr
|
Data
|
Streaming-Data
Transfers
In Sep 1989, IBM announced three new procedures for higher
data transfer rates- 40MB/s, 80MB/s, and 160MB/s. The 80MB/sec streaming-data
rate can be obtained with existing hardware (as of 1991!). Streaming data
is only effective for applications that transfer large amounts of sequentially
arranged data.
The actual data transfer rate achieved is a function of
the total burst (packet) length, where the overhead (arbitration process
and the address designation of the burst) is “amortized” over a large amount
of data. Applications that can benefit include high speed LAN adapters
(FDDI), storage devices (SCSI adapters, DASD), and channel-attached memory
(memory cards).
NOTE: 80 and 160MB/sec
streaming is only available on machines / adapters that have dual-path
bus capabilities. Both adapters / devices must support streaming.
32-bit or 16-bit
Streaming
This is a refinement of the basic cycle. The data transfer
is still preceeded by the address, but the address is designated at the
beginning of the transfer and incremented based on the number of bytes
of information to be transferred.
This reduces the cycle time to 100ns and results in an
instantaneous data rate of 40MB/sec for 32-bit transfers and 20MB/sec for
16-bit transfers for sequentially ordered data. Note
the Address bus has nothing to do after the initial address. The 40MB/sec
rate is available on single path systems.
32 or 16 Bit Streaming
|
Time
|
100ns
|
100ns
|
100ns
|
100ns
|
| |
Addr
|
|
|
|
| |
|
Data
|
Data
|
Data
|
64-bit Streaming
The address bus is used at the start of the data transfer
for the address but then is used to transfer data, resulting in a 64-bit
data path. Transfer rates of 80MB/s can be achieved for sequentially ordered
data. The 80MB/s data rate should be attainable with existing hardware.
Note that a dual-path system is required. On the 90 and 95 models, the
Type 3 and 4 complexes have the enhanced dual path memory buses.
64-Bit Streaming
|
Time
|
100ns
|
100ns
|
100ns
|
100ns
|
| |
Addr
|
Data
|
Data
|
Data
|
| |
|
Data
|
Data
|
Data
|
64-bit
Streaming with 50ns cycle
The address bus is used at the start of the data transfer
for the address but then is used to transfer data, resulting in a 64-bit
data path. The cycle time has been reduced to 50ns. There is only a 64-bit
form of this transfer.
It can support 160MB/sec for sequentially ordered data.
The 160MB/sec may require new signal drivers and recievers. (The Streaming-capable
adapters may have it already, like the Fast/Wide, FDDI, FW RAID..). A dual-path
system is required.
64-Bit Streaming with 50ns Cycle
|
Time
|
50ns
|
50ns
|
50ns
|
50ns
|
| |
Addr
|
Data
|
Data
|
Data
|
| |
|
Data
|
Data
|
Data
|
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