A 0.1–5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS
Abstract A 0.1–5.0 GHz flexible software-defined radio (SDR) receiver with digitally assisted
calibration is presented, employing a zero-IF/low-IF reconfigurable architecture for both
wideband and narrowband applications. The receiver composes of a main-path based on a
current-mode mixer for low noise, a high linearity sub-path based on a voltage-mode
passive mixer for out-of-band rejection, and a harmonic rejection (HR) path with vector gain
calibration. A dual feedback LNA with “8” shape nested inductor structure, a cascode …
calibration is presented, employing a zero-IF/low-IF reconfigurable architecture for both
wideband and narrowband applications. The receiver composes of a main-path based on a
current-mode mixer for low noise, a high linearity sub-path based on a voltage-mode
passive mixer for out-of-band rejection, and a harmonic rejection (HR) path with vector gain
calibration. A dual feedback LNA with “8” shape nested inductor structure, a cascode …
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