2023/12/05 · This work proposes layer-wise configurable timesteps (LCTs) and channel-regrouped sparse convolution (CRSC) to explore and exploit the redundancy of temporal ...

An SNN hardware accelerator integrating LCT and CRSC is designed to reduce memory access and computational latency. The main contributions of this work are ...

To achieve high energy efficiency, this work proposes layer-wise configurable timesteps (LCTs) and channel-regrouped sparse convolution (CRSC) to explore and ...

2022/03/14 · In this work, we propose an FPGA-based convolutional SNN accelerator called Skydiver that exploits spatio-temporal workload balance.

2024/01/17 · A Supervised Learning Algorithm for Multilayer Spiking Neural Networks Based on Temporal Coding Toward Energy-Efficient VLSI Processor Design ...

SNNs have sparse neuron firing over time, i.e., spatio-temporal sparsity; thus, they are useful to enable energy-efficient hardware inference. However, ...

Spiking neural networks (SNNs) are promising alternatives to artificial neural networks (ANNs) since they are more realistic brain-inspired computing models ...

2023/12/28 · In this work, we present an energy-efficient implementation of a Reinforcement Learning (RL) algorithm using SNNs to solve an obstacle avoidance ...

SLSSNN: High energy efficiency spike-train level spiking neural networks with spatio-temporal conversion ... Spiking Neural Network Accelerator Exploiting Spatio- ...

This paper proposes a sparse compressed spiking neural network accelerator that takes advantage of the high sparsity of activation maps and weights.