*please use pen and paper to show work (thank you!!!)* Design a synchronous binary up-counter using 4 negative edge-triggered JK flip-flops provided with a clock. The states (sequences) 1100, 1001 and 1000 are considered as unused states. (i) Draw the state diagram of the counter. (ii) Build the counter’s state table showing the synchronous inputs of the JK flip-flops as well. (iii) Using Karnaugh-maps, find the minimal sum-of-products (SOP) form of the equations for the inputs to the flip-flops; assume the next states of the unused combinations to be <don’t care states=. (iv) Draw the logic circuit of the counter.
*please use pen and paper to show work (thank you!!!)* Design a synchronous binary up-counter using 4 negative edge-triggered JK flip-flops provided with a clock. The states (sequences) 1100, 1001 and 1000 are considered as unused states. (i) Draw the state diagram of the counter. (ii) Build the counter’s state table showing the synchronous inputs of the JK flip-flops as well. (iii) Using Karnaugh-maps, find the minimal sum-of-products (SOP) form of the equations for the inputs to the flip-flops; assume the next states of the unused combinations to be <don’t care states=. (iv) Draw the logic circuit of the counter.
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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*please use pen and paper to show work (thank you!!!)*
Design a synchronous binary up-counter using 4 negative edge-triggered JK flip-flops provided with a clock. The states (sequences) 1100, 1001 and 1000 are considered as unused states.
(i) Draw the state diagram of the counter.
(ii) Build the counter’s state table showing the synchronous inputs of the JK flip-flops as well.
(iii) Using Karnaugh-maps, find the minimal sum-of-products (SOP) form of the equations for the inputs to the flip-flops; assume the next states of the unused combinations to be <don’t care states=.
(iv) Draw the logic circuit of the counter.
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